David_
Advanced Member level 2
Hello.
A couple of years ago or something I was getting advice here on EdaBoard about how to design a dual-channel Lock-In Amplifier(LIA) with the goal of being able to measure complex impedance across a frequency range of 10Hz - 1MHz, I was told(I have received the same answers from other places as well) that a Phase-Locked Loop(PLL) can be used to create a reference signal for the second Phase-Sensitive Detector(PSD) that is phase shifted by 90° from the original reference signal that drives the first PSD.
But I am trying to learn about PLL's and I have chosen to look at the CD4046 first, it's datasheet states that it can manage frequencies below 1,2MHz so I know it can manage the highest frequency that I'm concerned with e.i. 1MHz. I would like to ask some questions about how to make the PLL to be able to phase shift a reference signal that will be adjusted between 10Hz and 1MHz but first I have something else to ask.
How exactly would I use a CD4046 to phase shift a reference signal?
I have read through these two documents which are the datasheet and an application note, but I still don't understand how this 90° phase shift function would be implemented or achieved.
Are there anyone here who could enlighten me as to how to use a PLL to perform this task?
Regards
A couple of years ago or something I was getting advice here on EdaBoard about how to design a dual-channel Lock-In Amplifier(LIA) with the goal of being able to measure complex impedance across a frequency range of 10Hz - 1MHz, I was told(I have received the same answers from other places as well) that a Phase-Locked Loop(PLL) can be used to create a reference signal for the second Phase-Sensitive Detector(PSD) that is phase shifted by 90° from the original reference signal that drives the first PSD.
But I am trying to learn about PLL's and I have chosen to look at the CD4046 first, it's datasheet states that it can manage frequencies below 1,2MHz so I know it can manage the highest frequency that I'm concerned with e.i. 1MHz. I would like to ask some questions about how to make the PLL to be able to phase shift a reference signal that will be adjusted between 10Hz and 1MHz but first I have something else to ask.
How exactly would I use a CD4046 to phase shift a reference signal?
I have read through these two documents which are the datasheet and an application note, but I still don't understand how this 90° phase shift function would be implemented or achieved.
Are there anyone here who could enlighten me as to how to use a PLL to perform this task?
Regards