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Best way to interface with 14-bit 20MSample/s ADC

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Palpurul

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I am trying to find the best way to interface with this ADC https://www.ti.com/lit/ds/symlink/adc14l020.pdf
I am new to this subject (obviously), I dealt with analog stuff mostly. That's why I am here ask for advice

It is a 20 MSPS 14-bit ADC with parallel interface.I want to store 64M samples using a few SDRAMs. Basically, I have to store 14-bits or (16-bits) of parallel data every 100ns.

What's the most painless way to implement this? FPGAs seem to be the appropriate choice, but there are also a lot of DSPs and microcontrollers with parallel RAM interface. What are the most important advantages and disadvantages of both ways? or is there any other way to do this?

Thanks in advance!
 

Without knowing your detailed project requirements I would suggest programmable logic (CPLD, FPGA).
 
Without knowing your detailed project requirements I would suggest programmable logic (CPLD, FPGA).
It's going to be sent to the computer via USB for analysis and processing.


What is going to happen to your stored samples?
I want to capture 64Msamples at 20Msample/s. For 14-bits it's 280Mbps. I want to write all of that into SDRAM (SDR SDRAM) and send them to the computer via USB when the acquisition is done. It's basically a DAQ system. That's what I basically want to do.

I have some experience with microcontrollers and I thougt of using DSPs for that purpose, but my experience with this stuff is pretty limited, so I don't really know where to start. I am just trying to figure out what's more suitable so that I can start learning it.
 

The USB core will be bulky in an FPGA and not free (unless you want to roll your own - good luck!). So you'll either need a different interface for the transfer or not an FPGA.
 
This article might give you some ideas on how to interface USB with an FPGA. I woiuld suggest using the last method, a serparate USB controller chip and an FPGA would likely be a lot easier and would require a much smaller FPGA device or CPLD than including a soft USB core, It's also likely to be cheaper.
 
Thanks for all of your responses.
The first problem that I wanted to solve was getting data from ADC to RAM at the desired sampling rate.
I didn't think implementing usb in FPGA is going to be such a problem. It seems like a microcontroller with appropriate usb controller would make things really easier. I'll read the article you suggested, research further and decide what to do.
Is using an fpga for storing data to Ram and using a mediocre 16-bit micro with usb interface a good idea for this application?

I really appriciate you guys for making me realize some of the difficulties that I couldn't realize.

Thanks!

- - - Updated - - -

I just had an idea.
I have a deo 10 lite board.
It has a max 10 fpga, sdram and usb interface which is implemented with cpld and ftdi chip.
I first build the adc board as a piggyback board to deo 10 lite and try to interface with the adc. Maybe that's a good starting point?
Waiting for your suggestions
Thanks!
 

Hi,

I did a project with 50MSmpls/s 14 bit ADC, a couple of MBytes SRAM, USB interface.
The differences are:
* less memory size (easier)
* SRAM instead of SDRAM (easier, no refresh, no latency..)
* USB via high speed FTDI USB chip (easier)
Please decide if you can simplify your requirements...

It is a 20 MSPS 14-bit ADC with parallel interface.I want to store 64M samples using a few SDRAMs. Basically, I have to store 14-bits or (16-bits) of parallel data every 100ns.
How can this be?
20MSmpls/s x 14 bits means 40MBytes/s, this is one byte per 25ns. Or one word every 50ns.

Klaus
 

Just make sure that the USB connection can transfer the data fast enough for you. Given 2 bytes every 100nSec means a *sustained* 20MByte/Sec transfer rate over the USB.
The alternative is to take your readings as a burst and then transfer them out over USB at whatever speed you can.
Susan
 

Hi,

How can this be?
20MSmpls/s x 14 bits means 40MBytes/s, this is one byte per 25ns. Or one word every 50ns.

Klaus

That was my mistake sorry.

I did a project with 50MSmpls/s 14 bit ADC, a couple of MBytes SRAM, USB interface.
The differences are:
* less memory size (easier)
* SRAM instead of SDRAM (easier, no refresh, no latency..)
* USB via high speed FTDI USB chip (easier)
Please decide if you can simplify your requirements...
Klaus

I can definitely change some of the requirements. Storing captured data to high speed RAM was the first thing that came to my mind because many oscillscopes work that way. Is it easier to use high-speed USB at this data rate?
Your data rate is higher. It's more than USB 2.0 can handle. Was the interface USB 3.0?

Just make sure that the USB connection can transfer the data fast enough for you. Given 2 bytes every 100nSec means a *sustained* 20MByte/Sec transfer rate over the USB.
The alternative is to take your readings as a burst and then transfer them out over USB at whatever speed you can.
Susan

Susan

That's one of the things that is troubling me. How achivable 20MByte/sec via USB is? Depending on that I can relax the requirement for RAM, this would make things a lot easier.

Thanks!
 

The data rate is definitely achievable with superspeed USB, but it's a matter of host performance if they manage the sustained data rate. A SS interface chip with built-in FIFO from FTDI or Cypress can probably do it without a RAM or additional controller.
 

Hi,

Your data rate is higher. It's more than USB 2.0 can handle. Was the interface USB 3.0?
No, we do not real time processing.
We used one shot...triggered and sampled and sored in SRAM, controlled by an FPGA.
After that ... transferred via parallel interface to the FTDI chip and tranferred with USB 2.0 to the PC.
About 250..300MBit/s USB payload.

Klaus
 

Hi,


No, we do not real time processing.
We used one shot...triggered and sampled and sored in SRAM, controlled by an FPGA.
After that ... transferred via parallel interface to the FTDI chip and tranferred with USB 2.0 to the PC.
About 250..300MBit/s USB payload.

Klaus

I got it!
Thanks for your help!
 

You can always use Fast Ethernet to dump data into PC. UDP is quite easy to implement. It you don't plan to start a mass production of your device then take a simple eval board and attach your ADC into it - I would use Artix A7 from Digilent (with Ethernet and DDR RAM - and there is a ready to use memory controller with AXI4 interface from IP library).
 
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