Stability of Analog Circuits

Hello,

I want to test the stability of this vt-reference bias circuit.

See attached. The three transistors on the right are the start up circuit.

How would I measure the stability using transient analysis ?

How would I measure the stability using AC analysis ? I plan to use the current source as shown to do the AC stability analysis.

Thank you.

Transient: apply a step-load from Iload(min) to Iload(max)
and observe the overshoot / ringing (or the complete lack,
if overdamped / stable). And the reverse (one or the other
is likely to be the worst case). If you expect no DC load (as
with many CMOS mixed signal designs) then "up" or "down"
current impulses (width and height representing normal
"shuttle charge" load, perhaps with some margin)

Classical loop stability analysis in frequency domain wants the
loop "opened" (where this is done, is a key choice) and the
output and input phase, amplitude observed; display mag in
db20 and phase (as vp(out)-vp(in)) adjusted by 180, -180,
... such that it starts at +180 and falls past zero. Look up
"Bode plot" for how to display and what to make of it.


I do not like the "stb" analysis that Cadence/Spectre performs
because it doesn't, always, and hides stuff you ought to be
able to look at for debug. Prefer to do maths on the low level
results and make my own criticism.
at

Hello,

Thank you for your response.

In AC analysis, can I inject a current into this circuit I attached, the bias circuit, and look at the input admittance and see whether it is negative or positive and from that assess the stability and the de coupling capacitance I need to stabilize it?

So take the admittance by using the output voltage and the injected current?

Is this a correct approach ?

This might be faster that transient analysis to find the decoupling capacitor?

I want to avoid opening the loop and doing loop gain or stb analysis, as I find this too intensive.

Is this the correct approach?