skatefast08
Full Member level 3
ok, I tried to so many different ways to create an EM simulation so that I can get an approximate s-parameter simulation as in the schematic as shown below in the figure 1 that corresponds to the s-parameter graph in figure 2. In the layout, I used 4 different conductors (ex. M2, cond, cond2, M3) to represent different pins on the transistor (ex. G, S1, S2, and D). Also, I created 4 vias, 2 on the S1, and 2 on the S2 as shown in my layout. The layout is shown in Figure 3. For my s-parameter simulation of the layout is shown in figure 4. What am I doing wrong? I have shown my substrate as shown in figure 5. I also show another pic in figure 6 if that helps, because I get a warning during simulation.
My main task is to simulate a layout that can give me a good representation of what I have in figure 2. I want to map the ADS-transistor-model from the schematic window to the layout and then be able to generate the new s-parameters based on the whole layout. Is this the way to do it, or how would you do this? I want to simulate my LNA design on EM simulation, but I want to start out with the basics with just the transistor itself. thanks!
figure 1
figure 2
figure 3
figure 4
figure 5
figure 6
My main task is to simulate a layout that can give me a good representation of what I have in figure 2. I want to map the ADS-transistor-model from the schematic window to the layout and then be able to generate the new s-parameters based on the whole layout. Is this the way to do it, or how would you do this? I want to simulate my LNA design on EM simulation, but I want to start out with the basics with just the transistor itself. thanks!
figure 1
figure 2
figure 3
figure 4
figure 5
figure 6
Attachments
Last edited: