Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Design Transimpedance, multigain stage

Status
Not open for further replies.

Azerzen

Newbie level 1
Joined
Nov 7, 2018
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
13
Hi,

I am currently trying to design a transimpedance with multigain stage using analog switches.

The board must be able to perform measurement between 6mA to 6nA with a bandwidth up to 20MHz. I know that it's impossible to have 20MHz on the 5 gain but at least on the 10^3/10^4/10^5.

The main problem is that the parasitic capacitance Cds of the switch decreases a lot the overall bandwitdh.

Do anybody have an idea about how design such a project?

Best Regards,

Azerzen
 

Hi,

you mean transimpedance amplifier?

What supply voltage?
What output voltage range?
What load current / load_impedance?

What output_voltage/input_current ratio(s) do you whish? (in V/uA)

A sketch about your idea (even hand drawn) may help.

Klaus

In the other (deleted) post you talk about:
6mA to 600nA so 5 decades.
Very confusing:
* 600nA to 6mA is 4 decades
* but 6nA to 6mA (mentioned here in post#1) is 6 decades
--> please clarify.

But avoid to give every post a new/modified requirement. Please first decide: What do you need "at least" and what do you like as "nice to have".
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top