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W/L ratio calculation

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poojadholam

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Can anybody suggest me how to calculate W/L ratios of following circuits and biasing voltages?
Circuit 1: Rail to rail amplifier
Circuit 2: combination of Resistor and Nmos (so i will get different gains using those combination)
In Circuit 1 i will replace R1 and R0 by circuit 2. NMOS are used as a switch.
Circuit1.jpg
Circuit2.jpg
 

You know, nobody will suggest you a good solution without showing the required specifications, there is a lot. Speed, offset, slew rate, consumption, what and how much will be the load, etc.
But a very important thing, if you want to switch those NMOS transistors in circuit 2 assume the feedback node's voltage will vary a lot, and the resistance of the transistors will change with the varying Vgs.
Use parallel PMOS-NMOS switches (transfer gates) rather to keep the switch resistance at low, use minimum length for them and relatively high widths.
If under control the total switch resistance values always lower like 10 times than the other R values the switches won't cause problem.
 

Thank you for your prompt reply. TS gate part is very helpful.

Its true without specification nobody can suggest me solution for calculations.
so here are my specifications:
Power Supply / Vdd: 3.3 V
I should achieve gain 0, 10,20... 60 dB.
I: 10 uA
Vcm: 1.65 v
load: Capacitive: 1pF
Resistive: 1M ohm
 

1, speed? (closed loop bandwidth? slew rate?)
2, if speed doesn't matter I assume it is a DC amplifier. how much is the offset requirement?
3, why you need rail2rail input stage if the common mode is only 1.65V? for inverting amplifier the input node voltages follow the common mode under control, it doesn't makes sense.
4, 60dB closed loop gain is quite too much for above amplifier, I am not sure you will reach this with 1 amplifier, with series amplifiers you have to divide the target current consumption, which is quite low at now, your amplifier can be overloaded with the feedback resistor for large signal.
5, how much is the minimum and maximum output voltage? if it is a rail2rail amplifier I assume you want rail2rail output.
 

Thank you for your reply
1. GBW(open loop)= 10 MHz, Slew rate= 5v/us

2.I need rail to rail amplifier which will give me output voltage swing 0 to 3.3 V (little bit variation is ok).

3.Input common mode voltage range is 0.4 V to 2.9 V.
 

I can tell that in the last 20 years of analog IC design I
have not once resorted to manual calculations of W/L.

Maybe this is an exercise meant to "build character".

In any case I would use a simulator to do the figuring,
since much more effort and accuracy went into any
SPICE model, than can be expressed by or trusted from
a tractable closed form solution for any attribute (let
alone, multiple optimization goals).

Leaving aside the futility of trying this at all, in deep
submicron technologies where simple models don't work
and you end up with a few hundred, with a hundred of
'em doing something useful (i.e. not left to defaults).
 

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