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4th December 2018, 08:10 #1
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3bit adder w 4 bit sum; connect to 2 "7 segment" displays
Code:module Fulladd( input a input b, input cin, output s, output cout ); xor(s, a, b, cin); and(t1, a, b); and(t2, a, cin); and(t3, b, cin); or(cout, t1, t2, t3); endmodule module add3(a2, a1, a0, b2, b1, b0, s2, s1, s0, cout); input a2, a1, a0, b2, b1, b0; output cout, s2, s1, s0; Fulladd stage0 (a0, b0, 0, s0, c1); Fulladd stage1 (a1, b1, c1, s1, c2); Fulladd stage2 (a2, b2, c2, s2, cout); endmodule //
My teacher gave me a hint but would not help much further. He told me the module with have "assign a" and assignment verilog. I am using this in Vivado and a Basys3 board to display this in class.
Thanks in advance for help!

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4th December 2018, 11:02 #2
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Re: 3bit adder w 4 bit sum; connect to 2 "7 segment" displays
It is your homework right?
Ask yourself, where and how is the adding taking place?
What you have posted is just the top module which instantiates other modules.
Most important, please write a testbench first and verify whether your design is working in simulation. Later go for board level implementation.FPGA enthusiast!

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4th December 2018, 16:43 #3
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Re: 3bit adder w 4 bit sum; connect to 2 "7 segment" displays
Those aren't other modules, they are Verilog language primitives for gates, they are part of the language. Don't know why anyone would teach using them, they seem rather pointless to me, I've never had a reason to use them for 20+ years.
Note the output of the adder is in binary therefore 1001 = 9 and is the largest single digit number you can represent. Values form 1010 to 1111 require a 10s digit. Search for the double dabble algorithm.

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4th December 2018, 17:30 #4
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Re: 3bit adder w 4 bit sum; connect to 2 "7 segment" displays
My teacher gave me a hint but would not help much further.

4th December 2018, 18:03 #5
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Re: 3bit adder w 4 bit sum; connect to 2 "7 segment" displays
The question to me is vague.
I think he has more up to two 3bit inputs where he feeds 0 upto 7 to the FPGA from each input. For the outputs to be 4bit outputs, I think those are BCD outputs. The board seems to have a BCDtosevensegment converter. I think he needshould to implement addition on the 3bit inputs and then convert the result from straight binary to BCD.
I don't know the board. I'm just guessing. I don't use verilog either.
Akanimo.
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