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How can I calculate the R and C in CT modulator?

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wjxcom

wjxcom

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Hi all, I want to know how to design the R and C in the following CT modulator,
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This circuit can be found in the book "Continuous Time Delta-Sigma AD Conversion" that was uploaded in the attachments, in chapter 7, at the page 179.
I think R1 and RDAC1 can be found from SNR, but how to design R2, RDAC2, R3 and RDAC3?
By the way, can somebody help me to find this artical:F. Gerfers, M. Ortmanns, and Y. Manoli, “A 12-bit power efficient continuous-time ΣΔ modulator with 220µW power consumption,” in Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), 2001, pp. 536–539

Help me please, thx!!!
 

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Probably in the area of 1k or 10k ohms.
If you choose a very low resistance (say 10-100 ohms) then it leads to high Ampere flow.
Or if you choose a very high resistance (say 100k-1M) then your op amps tend to load the network because their typical input resistance is 1M.
 
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BradtheRad said:
Probably in the area of 1k or 10k ohms.
If you choose a very low resistance (say 10-100 ohms) then it leads to high Ampere flow.
Or if you choose a very high resistance (say 100k-1M) then your op amps tend to load the network because their typical input resistance is 1M.
Click to expand...

Hi BradtheRad, thax you to reply me. In fact, the resistance in the first stage can be calculated by NOISE, But I do not know how to design the resistance in the second stage and the third stage. Maybe the value of these resistances can be designed arbitrarily？
 

Select resistor values which cooperate with the amount of current available from the op amps.
Suppose the op amp is rated 20mA output. Then your RC networks should not try to draw 20 mA. Instead they should be designed to draw, say 1 mA. The aim is to minimize distortion of output voltage. This means your output resistance should not be so low that it significantly pulls down output amplitude.
 

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