rmanalo
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Hello everyone, I have a question on biasing circuits.
The first image is from "Design of Analog CMOS Integrated Circuits" by Razavi and the second image is from "CMOS Circuit Design, Layout, and Simulation" by Baker.
[1] From Razavi, the resistor capacitor product of R_B and C_B should be lower than the lowest frequency of the input signal. For practical reasons, my assumption of this should be 10 times lower. However, I've read somewhere (I beleive it was a book on RF circuits by Thomas Lee) that the size limit for a capacitor should be 20pF for it to be integrated in a chip otherwise it should be an off-chip capacitor. Should the max size of the capacitor be this value? Say for example a 1Mhz input signal, with C_B as 20pF and R_B calculated as 80kohm, are these values big enough? or should I choose arbitrarily large values?
[2] in the second image, does the 100k and big capacitor combination have any effect on the input signal?
The first image is from "Design of Analog CMOS Integrated Circuits" by Razavi and the second image is from "CMOS Circuit Design, Layout, and Simulation" by Baker.
[1] From Razavi, the resistor capacitor product of R_B and C_B should be lower than the lowest frequency of the input signal. For practical reasons, my assumption of this should be 10 times lower. However, I've read somewhere (I beleive it was a book on RF circuits by Thomas Lee) that the size limit for a capacitor should be 20pF for it to be integrated in a chip otherwise it should be an off-chip capacitor. Should the max size of the capacitor be this value? Say for example a 1Mhz input signal, with C_B as 20pF and R_B calculated as 80kohm, are these values big enough? or should I choose arbitrarily large values?
[2] in the second image, does the 100k and big capacitor combination have any effect on the input signal?