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3 bit unsigned adder in behavioral verilog w a 4-bit sum

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I need help creating verilog that takes two, 3-bit unsigned integers as input, adds those two integers together to produce a 4-bit sum, and displays that sum on 7-segment display. I need it to be in behavioral verilog. Can anyone please help me with this? I am going to be displaying it on a Basys3 board.
 

Seriously!? You can't even make a minimal effort to try and do this yourself?

In an edge sensitive always block

sum <= a + b;

is how you "add" two 3-bit numbers to produce a 4-bit result. Go read some books on Verilog and do some searches on the internet for the rest. It's not like this kind of thing hasn't been done before.

If you don't learn how to do some research and learn on your own your going to turn out to be a really bad engineer.
 
HI,

you can check how to display a number in 7 segment display

thanks and regards
 

Can anyone please help me with this? I am going to be displaying it on a Basys3 board.
Click to expand...
Self help is always the best help!
I did a Google search with the phrase :Basys3 board 7 segment display: and that came up many tutorials where the use of Basys3 board 7 segment display is mentioned in details.
 
The logic doing the addition you should be able to do yourself with the hints given in post#2.
 

dpaul said:
Self help is always the best help!
I did a Google search with the phrase :Basys3 board 7 segment display: and that came up many tutorials where the use of Basys3 board 7 segment display is mentioned in details.
Click to expand...

Okay thanks! I will try to do some self research before I ask some more questions! I just got stuck with a not so good professor and I am actually a IT major just taking this to learn some verilog so I am not strong in this subject. I know basic verilog just not behavioral and my professor wasn't that helpful when explaining it.
 

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