Microblaze and PmodCAN (Digilent IP core) in Vivado 2018.2

Hello,

I am trying to make working Microblaze soft-processor with "PmodCAN" shield from Digilent. I am using "Vivado 2018.2" on Windows 10 PC box. My FPGA board is "Cmod A7" (from Digilent) width Artix 7 chip. Here is link to this board:

https://reference.digilentinc.com/reference/programmable-logic/cmod-a7/start?redirect=1id=cmod_a7/cmhttp://

Here is link to "PmodCAN" shied which I am using:

https://store.digilentinc.com/pmod-can-can-2-0b-controller-with-integrated-transceiver/

I am following this tutorial:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start

I stalled after point 7 of this tutorial (after adding interrupts from Pmod module). I don't konw how to connect outputs from "PmodCAN" to AXI bus (AXI GPIO).

My block desing looks like on these screen shots:



Here is link to my project (Vivado 2018.2) on my Google drive:

**broken link removed**

I will be grateful for any help.

Regards

It is already connected on your design - there is a connection between AXI_LITE_GPIO of PmodCAN_0 and M03_AXI of microblaze_0_axi_perph.

filip.amator said:

It is already connected on your design - there is a connection between AXI_LITE_GPIO of PmodCAN_0 and M03_AXI of microblaze_0_axi_perph.

Click to expand...

Hello,

thanks for quick answer. When I am cliking "Validate design - F6" I have message:

[BD 41-759] The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified. These pins are tied-off to all 0's to avoid error in Implementation flow.
Please check your design and connect them as needed:
/PmodCAN_0/Pmod_out_pin10_i
/PmodCAN_0/Pmod_out_pin1_i
/PmodCAN_0/Pmod_out_pin2_i
/PmodCAN_0/Pmod_out_pin3_i
/PmodCAN_0/Pmod_out_pin4_i
/PmodCAN_0/Pmod_out_pin7_i
/PmodCAN_0/Pmod_out_pin8_i
/PmodCAN_0/Pmod_out_pin9_i

Click to expand...

This message is related to outputs oc "PmodCAN" (see screen shot):



It is not clear for me, what is purpose of these outputs?

Best Regards

Isn't it 10-pin Pmod Interface Type 2A (expanded SPI) plus GND and VCC described here https://reference.digilentinc.com/_media/reference/pmod/pmod-interface-specification-1_1_0.pdf?

You have 10 tri-state ports.

FlyingDutch said:

It is not clear for me, what is purpose of these outputs?

Click to expand...

This piece of code is designed for your CAN module. At one side it is connected to AXI bus and at another side must be connected to your hardware - your Pmod module.

Hello,

I've made an experiment: in my Vivado project I changed board form "CmodA7" into "Arty S7", then I opned "Block Design" and run "Connection automation". After this all Pmod "out" lines had been connected automagically to the rest of design properly. After that when I am clicking "Validate design - F6" I haven't any warnings or error messages.

I am confused a bit. I understand that "CmodA7" board has only one Pmod socket, but there are 48 available IN/OUT pins from Artix7 FPGA chip, which can be used for connection to "PmodCAN" module. I don't know how to achive such thing as connecting "PmodCAN" inputs/outputs to my "CmodA7" board using "user constraint files" on "Block design". I was looking for related to this subject documentation from Xilinx, but it wasn't succesful. Could I ask somebody to direct me on solution of this issue?

Thanks in advance and regards

Hello,

I've changed my FPGA board from "CmodA7" (Artix7) to Zybo(Zynq SoC), and instead using Microblaze i used Zynq(ARM 9 hard processor). With this board (Zybo) I was able to connect PmodCAN without errors. There weren't any error messages during synthessis and implementastion. After generating bitstream I had exported this project to Xilinx SDK. SDK project is compiling without any erros. I wolud like to examine if CAN module is working properly with another CAN node made on STM32 MCU.

Regards

It looks like you don't have some definitions in board file or the interface definition is missing in you Vivado project.

Check if you have added interface definition "digilentinc.com:interfacemod_rtl:1.0" to the Vivado project in Settings->IP->Repository (the source is on Digilent site: https://github.com/Digilent/vivado-library/releases ).
Did you drag & drop (or Right Click and Connect Board Component...) the PMOD component from Board Tab in Block Design? - this is the only proper way to connect IP interface with the external ports.

niciki said:

It looks like you don't have some definitions in board file or the interface definition is missing in you Vivado project.

Check if you have added interface definition "digilentinc.com:interfacemod_rtl:1.0" to the Vivado project in Settings->IP->Repository (the source is on Digilent site: https://github.com/Digilent/vivado-library/releases ).
Did you drag & drop (or Right Click and Connect Board Component...) the PMOD component from Board Tab in Block Design? - this is the only proper way to connect IP interface with the external ports.

Click to expand...

Hello Niciki,

yes I did it (these two steps described by you).

Best Regards.

What the Tcl console in Vivado says? Is there any errors during instantiating the PMOD ccomponent?
Please copy the content here for analysis.