XilinX LWIP : Whether Ethernetlite design can be implemented without using AXI UART

I am using KC705 board. I have implemented the data transfer between the PC and board using the AXI-UARTLITE, microblaze, AXI-Timer and Interrupt controller. Now, the same design I need to run the Axi-Ethernetlite design with microblaze and without using AXI-UARTLITE. Is it possible to implement the Axi-Ethernetlite design without using AXI-UARTLITE. If yes, How can be the vivado design ? Please suggest me.

Is it possible to implement the Axi-Ethernetlite design without using AXI-UARTLITE. If yes, How can be the vivado design ? Please suggest me.

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Did you try to help yourself?

This docu is your friend: https://www.xilinx.com/support/docu..._ethernetlite/v3_0/pg135-axi-ethernetlite.pdf

In there you have Chapter5 : Example Design will show you how to implement the core.

Thanks for your response. Did you mean AXI Traffic Generator (ATG) and AXI Ethernetlite ? I am using AXI UARTLITE for printing the data in console. I am sending the data to AXI Ethernetlite from Aurora IP.

In my current design, i have implemented the below process using the AXI UARTLITE.

1. Counter data (Binary Counter IP) from Kintex DAQ board (Part Number : XC7k160tffg676-2) is passing to the KINTEX KC705 board through optical cable. No issue. I am able to read the data in KINTEX KC705 through AXI FIFO

2. KC705 board will pass the data From FIFO to PC through LWIP Echo server, where i can able to read the data in Hercules.

Same Process should be done without using AXI UARTLITE module. The data transfer should happen over Ethernet. So, whether AXI Traffic Generator (ATG) will be usefull inplace of AXI UARTLITE to fulfill my design needs. Please answer me

http://forums.xilinx.com/t5/Embedded-Processor-System-Design/Implementation-of-LWIP-Echo-Server-Axi-ETHERNETLITE-without/m-p/901261#M42308

Did you read the docu?

Instead of UART communication, you communication would be from PCs Eth port to dev board Eth port. Inside the FPGA you will then need the Ethernetlite core and other logic.

I have gone through the document. Any example design please. Thanks