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  1. #1
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    What is wrong with this Mux code using indexing

    Code:
    ----------------------------------------------------------------------------------
    -- Company: 
    -- Engineer: 
    -- 
    -- Create Date:    14:48:40 09/27/2018 
    -- Design Name: 
    -- Module Name:    Mux256 - Behavioral 
    -- Project Name: 
    -- Target Devices: 
    -- Tool versions: 
    -- Description: 
    --
    -- Dependencies: 
    --
    -- Revision: 
    -- Revision 0.01 - File Created
    -- Additional Comments: 
    --
    ----------------------------------------------------------------------------------
    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.STD_LOGIC_ARITH.ALL;
    --use IEEE.STD_LOGIC_UNSIGNED.ALL;
    use IEEE.NUMERIC_STD.ALL;
    
    
    ---- Uncomment the following library declaration if instantiating
    ---- any Xilinx primitives in this code.
    --library UNISIM;
    --use UNISIM.VComponents.all;
    
    entity Mux256 is
        Port ( inp : in  STD_LOGIC_VECTOR (255 downto 0);
               sel : in  STD_LOGIC_VECTOR (7 downto 0);
               outp : out  STD_LOGIC);
    end Mux256;
    
     
    architecture Behavioral of Mux256 is
    signal sig_sel: integer; 
    signal sig_sel1: unsigned (7 downto 0); 
    begin
    	sig_sel1 <= unsigned(sel);
    	sig_sel  <= CONV_INTEGER(sig_sel1);
    	process(inp, sel)
    	begin
    			outp <= inp(sig_sel);
    	end process;
    end Behavioral;
    and here is its test bench, The code is synthesizing but when i run the simulation, the index is showing the negative value and simulation wont start

    Code:
    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.STD_LOGIC_ARITH.ALL;
    use IEEE.STD_LOGIC_UNSIGNED.ALL;
    use IEEE.NUMERIC_STD.ALL;
    
    ---- Uncomment the following library declaration if instantiating
    ---- any Xilinx primitives in this code.
    --library UNISIM;
    --use UNISIM.VComponents.all;
    
    entity Demux256 is
        Port ( inp : in  STD_LOGIC;
               sel : in  STD_LOGIC_VECTOR (7 downto 0);
               outp : out  STD_LOGIC_VECTOR (255 downto 0));
    end Demux256;
    
    architecture Behavioral of Demux256 is
    	signal temp_out: std_logic_vector (255 downto 0);
    	signal sig_sel: integer; 
    	signal sig_sel1: unsigned (7 downto 0); 
    begin
    	
    	sig_sel1 <= unsigned(sel);
    	sig_sel  <= CONV_INTEGER(sig_sel1);
    	
    	process(inp, sel)
    	begin
    			
    			if(inp = '1') then
    				temp_out(sig_sel) <= '1';
    			else
    				temp_out <= (others => '0');
    			end if;
    	end process;
    	
    	 outp <= temp_out;
    
    end Behavioral;

  2. #2
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    Re: What is wrong with this Mux code using indexing

    What do you mean by "wont start"
    You have a library conflict. Both std_logic_arith and numeric_std declare the unsigned type, meaning neither is visible. std_logic_arith is not a VHDL standard library, so you should comment it out and use only numeric_std.



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  3. #3
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    Re: What is wrong with this Mux code using indexing

    sensitivity list has sel, but process uses sig_sel.

    you can use numeric_std with the double-conversion method -- to_integer(unsigned(x)). You can also import only conv_integer from std_logic_arith, but people will yell at you.

    There may also be unconnected signals. You attached your array of latches "demux" instead of the testbench. Also, the implied circuit seems really unreliable.



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    Re: What is wrong with this Mux code using indexing

    Quote Originally Posted by vGoodtimes View Post
    you can use numeric_std with the double-conversion method -- to_integer(unsigned(x)). You can also import only conv_integer from std_logic_arith, but people will yell at you.
    THe 3rd option is to use numeric_std_unsigned from VHDL 2008. Then to_integer and to_slv functions are available.



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  5. #5
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    Re: What is wrong with this Mux code using indexing?

    internet says best way to do is "b <= to_integer(unsigned(a));" but whenever i use this statement, Xilinx gives me errors, I am using Xilinx 10.1 ISE



  6. #6
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    Re: What is wrong with this Mux code using indexing?

    You dont specify what the error is.
    But if your code is like your first post, I told you the answer in #2



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    Re: What is wrong with this Mux code using indexing?

    ISE10.1 probably has no support for VHDL 2008, they hardly have any support for it in ISE 14.7.

    Xilinx tool support has traditionally trailed the standards by at least 5-10 years. Just checked, ISE 10.1 was introduced in 2008, so it probably has no VHDL 2008 support and if it even exists it's alpha code and I wouldn't trust it to work correctly.



  8. #8
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    Re: What is wrong with this Mux code using indexing?

    The error in Xilinx 10.1 is "TO_INTEGER can not have such operands in this case" when i write

    Code:
     process(inp, sel)
    begin
             sig_out <= inp(TO_INTEGER(unsigned(sel)));
    end process;
    - - - Updated - - -

    Quote Originally Posted by TrickyDicky View Post
    You dont specify what the error is.
    But if your code is like your first post, I told you the answer in #2
    The error in Xilinx 10.1 is "TO_INTEGER can not have such operands in this case" when i write

    Code:

    process(inp, sel)
    begin
    sig_out <= inp(TO_INTEGER(unsigned(sel)));
    end process;

    - - - Updated - - -

    Quote Originally Posted by ads-ee View Post
    ISE10.1 probably has no support for VHDL 2008, they hardly have any support for it in ISE 14.7.

    Xilinx tool support has traditionally trailed the standards by at least 5-10 years. Just checked, ISE 10.1 was introduced in 2008, so it probably has no VHDL 2008 support and if it even exists it's alpha code and I wouldn't trust it to work correctly.
    When I tried to run the code in Vivado, the output of sig_sel <= TO_INTEGER(unsigned (sel)); ========= -2147483648 which cannot be an index value as I want sig_sel to be the index of inp(sig_sel)
    Please help me out



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    Re: What is wrong with this Mux code using indexing?

    Hi,

    Your code is a mux and your testbench is for a demux. Take a look at your entities and ports declarations.
    -------------
    --Akanimo.



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  10. #10
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    Re: What is wrong with this Mux code using indexing?

    Please post your new whole code. Did you at least delete std_logic_arith from your code?



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