dpaul
Advanced Member level 5
Hi,
We all know that the synth report contains a table that contains the number of resources utilized. I am particularly interested in the number of LUTs utilization counts (lets us ignore the BUF*, MMCM/PLL, DSP-slices, BRAMs, etc). Now there are stuff like LUT1, LUT2, LUT3, LUT4, LUT5 and LUT6. The synth report will contain the amount utilized by each of these LUTs.
Now lets assume that someone asks me if I can find out how many LUTs will be utilized if I want to implement a 100,000 gate ASIC in a Ultrascale or a 7 series Xilinx FPGA.
How do I find that? How can I *roughly* map the gate equivalent count to the LUTs count? Any suggestions?
I have referred to this 2015 blog from Synopsys and there is a reference to Xilinx in it:
https://blogs.synopsys.com/breaking...many-asic-gates-does-it-take-to-fill-an-fpga/
It says, 1* LUT = 6 Two input NAND Gate equivalent (go try it!)
What I don't understand is what is exactly meant by "LUT". Because in Xilinx devices we have LUT1, LUT2, LUT3, LUT4, LUT5 and LUT6. Is it indicating that I combine all the LUT* counts from my synth report and use that value in comparing with the gate equivalent count?
Any ideas?
We all know that the synth report contains a table that contains the number of resources utilized. I am particularly interested in the number of LUTs utilization counts (lets us ignore the BUF*, MMCM/PLL, DSP-slices, BRAMs, etc). Now there are stuff like LUT1, LUT2, LUT3, LUT4, LUT5 and LUT6. The synth report will contain the amount utilized by each of these LUTs.
Now lets assume that someone asks me if I can find out how many LUTs will be utilized if I want to implement a 100,000 gate ASIC in a Ultrascale or a 7 series Xilinx FPGA.
How do I find that? How can I *roughly* map the gate equivalent count to the LUTs count? Any suggestions?
I have referred to this 2015 blog from Synopsys and there is a reference to Xilinx in it:
https://blogs.synopsys.com/breaking...many-asic-gates-does-it-take-to-fill-an-fpga/
It says, 1* LUT = 6 Two input NAND Gate equivalent (go try it!)
What I don't understand is what is exactly meant by "LUT". Because in Xilinx devices we have LUT1, LUT2, LUT3, LUT4, LUT5 and LUT6. Is it indicating that I combine all the LUT* counts from my synth report and use that value in comparing with the gate equivalent count?
Any ideas?