tenso
Advanced Member level 4
I am attaching the schematic from Allen/Holberg of a comparator with hysteresis using internal positive feedback
I was hoping someone here could answer some of my questions.
1) How do the cross-coupled PMOS current mirrors enforce positive feedback?
2) The book says that there is both negative and positive feedback in the circuit above and that the +ve feedback factor ( and I think by extension loop gain) should be greater than the negative feedback factor to give hysteresis. The book says that there is current-series feedback ( I think this means series-series feedback?) through the common source node of M1 and M2, and that this is negative. The second is voltage shunt feedback ( I think this means shunt shunt feedback?) through the gate drain node of M6 and M7.
Can someone help me recognize the negative and positive feedback loops and the types of feedback for each loop?
Also if someone can link to the paper where the above architecture was proposed, that would be helpful.
Thanks