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Is it possible to Cache data from DDR3 when facing with MicroBlaze in KC705?

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msdarvishi

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Dear all,



I am using Vivado 2017.3 targeting a Kintex-7 with KC705 evaluation board.



I have a block design including Microblaze connected to MIG 7 Series DDR3 SDRAM and UART interface. I would like to load my C/C++ program written in SDK to the DDR3 and then execute and send results to the UART. I could do it by choosing the DDR3 memory in lscrip.ld file of SDK and it works properly. Now, for bigger C programs, loading them on the DDR3 and then reading back results will be very very slow.



I am wondering whether there is a way to cache loaded data from DDR3 to make easier for Microblaze to read and execute data from the cache instead of DDR3.



Kind help and guides are in advance appreciated.



Bests,
 

Include an instruction cache and a data cache in your design. They will be used automatically if you enable them for the correct address ranges.
The caches are a part of the Microblaze system, not the block generated by the MIG.
 

Include an instruction cache and a data cache in your design. They will be used automatically if you enable them for the correct address ranges.
The caches are a part of the Microblaze system, not the block generated by the MIG.

Dear @std_match,

Thanks for your reply. I found it and it is very useful. Thank you!
 

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