Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Lattice of plated over thermal vias are too close together in D2PAK footprint?

Status
Not open for further replies.
T

treez

Guest
Hello,
We have a D2PAK FET in a linear LED driver. It dissipates some 13W. It sits on a thermal pad which lies on a big metal heatsink.
We have got our PCB done with multiple epoxy filled thermal vias in the pad of the D2PAK...in fact, its a “Lattice” of 0.5mm diameter thermal vias whose centres are 0.9mm apart...so in fact, there are 140 thermal vias in the drain pad of the D2PAK. This lattice of thermal vias is to be entirely plated over with copper...(copper actually over the via openings).
Do you think we have got the thermal vias too close together? (There is only 0.4mm between the via hole perimeters)
 

Hi!
I did not quite understand why the vias need to be plated with copper.
For several years I've used 0.25mm diameter vias with a pitch of 0.5mm. For DPAK (not D2PAK) there are approximately 100 vias under the pad. The effective thermal resistance across the pad is nearly 0.8 degree C per watt for a 1mm thick PCB.
This is the measured thermal resistance using directly soldered liquid cooled water plate on bottom side of the pad. In practice the limiting factor is not really the thermal resistance of the vias but the interface between PCB and heatsink.
We manage around 5 to 7W for a DPAK package.
 

Surely having thermal vias in an FR4 PCB is better than not havign them?...the vias are plated over to allow better thermal contact of the pad with the tab on the d2pak
 

For highest thermal conductivity you would prefer open vias filled with solder. No plugging epoxy, even with enhanced thermal conductivity, can compete.
 

Heat is getting transferred to the other side by conduction through the via walls. The walls are plated with copper but the thickness of copper is not much; it is designed for electrical conduction and it cannot conduct heat as good as a copper foil. Big vias do eat up lots of copper surface - say about 20% of the copper is gone in the via openings. Now you fill up the hole with epoxy- this is clearly not a good idea because the plastic is a poor conductor of heat. Filling the vias with solder is better because solder is poorer conductor of heat compared to copper but far better than a plastic. 140 thermal vias appear to be a good number but you can reduce the diameter of the via (say 0.4mm) and fill them with solder. But 13W is a good amount of heat (and your mileage may vary). Also closing the via on the device side with copper is not good; anyway this plating will be relatively thin and the heat has to move through the vias (and the extra copper does not help).
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
The small drill-to-drill spacing is no problem for same net vias. As explained, it's the via copper and to some extent solder filling that provide heat sinking.

I see that VIPPO technology (via in pad plated over) may be a solution if you require a very flat interface at the bottom side. Nevertheless I would try with standard thermal via technology first.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Heat is getting transferred to the other side by conduction through the via walls. The walls are plated with copper but the thickness of copper is not much; it is designed for electrical conduction and it cannot conduct heat as good as a copper foil. Big vias do eat up lots of copper surface - say about 20% of the copper is gone in the via openings. Now you fill up the hole with epoxy- this is clearly not a good idea because the plastic is a poor conductor of heat. Filling the vias with solder is better because solder is poorer conductor of heat compared to copper but far better than a plastic. 140 thermal vias appear to be a good number but you can reduce the diameter of the via (say 0.4mm) and fill them with solder. But 13W is a good amount of heat (and your mileage may vary). Also closing the via on the device side with copper is not good; anyway this plating will be relatively thin and the heat has to move through the vias (and the extra copper does not help).

The copper plating thickness of through hole via is minimum 25um for 1oz plating. For 0.25mm diameter via, the area covered by copper plating is 20%. Even if solder is filled in the remaining 80% space, since solder thermal conductivity over 10 times less than copper, the net increase in thermal conductivity will not be more than 8 to 10%.
Nevertheless, I still apply ample solder paste on the pads to fill the vias and the effective thermal conductivity achievable is nearly 1W/degree C for 100x via matrix, 1mm PCB, 35um start Cu thickness and 75um finish Cu thickness.
 

Thanks, we would like indeed to fill the vias with solder instead of epoxy, but we presume this is more expensive?
The “lattice” I described was put forward by our PCB manufacturer.
We used to just have a few 0.3mm thermal vias in the pad (16), and not plated over, but we found that solder would leak through the vias during reflow and make bumpy, often sharp protrusions on the bottom side of the PCB, which is a very bad situation, so we don’t want to do that any more.
So basically, we don’t see how we can fill the vias with solder without the solder protruding out of the bottom side.
 

In practice the limiting factor is not really the thermal resistance of the vias but the interface between PCB and heatsink.
Yes. I think that's the point where an all-over plating of the bottom side thermal pad can be desirable, e.g. if you apply some kind of phase-change thermal pad with relative low thermal conductivity. Voids or unevenness in the interface surface will considerably increase the thermal resistance. VIPPO is however bringing several 10 percent higher PCB cost. Can you solder a copper plate to the bottom side?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top