Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Why DDR3\4, DM is not used in READ operation? I can see how its works on Write but not on read

Status
Not open for further replies.

ashwin975

Newbie level 3
Joined
Sep 21, 2018
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
26
Why DDR3\4, DM is not used in READ operation? I can see how its works on Write but not on read.
 

For read operations, it isn't a problem to read the full memory width. The reading device can use whatever bytes it wants.
For write operations, only the affected bytes can be written, otherwise the other bytes would be corrupted.
This means that the DM signals are only needed for write operations.

If the full memory width is used for all write operations, the DM signals are not needed.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top