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  1. #1
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    Regarding MTech thesis topic in Verilog in frontend

    sir,
    i am pursuing mtech in vlsi design .

    I dont get idea about latest trend for research used as thesis topic in my mtech .

    please suggest some good topic .

    I know xilinx vivado, cadence virtuoso, mentor graphic's pyxis tool and have some hand on session on zybo board , beysis 3 board.

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  2. #2
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    Re: Regarding MTech thesis topic in Verilog in frontend

    Quote Originally Posted by edeepak93 View Post
    sir,
    i am pursuing mtech in vlsi design .

    I dont get idea about latest trend for research used as thesis topic in my mtech .

    please suggest some good topic .

    I know xilinx vivado, cadence virtuoso, mentor graphic's pyxis tool and have some hand on session on zybo board , beysis 3 board.
    part of the problem is finding your topic of research. check some of the good vlsi conferences like DAC, ICCAD, see what people are working on.
    Really, I am not Sam.



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