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  1. #1
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    different voltages in IO Differencial ports

    I use XC4VLX100 , used buffers for HDMI output OBUFDS/OBUFTDS, in UG070.PDF said Virtex-4 can use IOSTANDARD LVDS_25, LVDSEXT_25, ULVDS_25,
    I used all of them but cannot pass implementation stage in ISE, but board used 3.3V only, it mean chip can check voltage ? and if I use external 2.5 V it must work ?

    board designers guid :
    Please note that you must use I/O standard “LVCMOS33” or “LVTTL”, when IO voltage is 3.3V. If you need to use other I/O standard, then, cut away J6 and J7, and connect external I/O voltage

    ISE says :

    ERROR:Pack:1107 - Pack was unable to combine the symbols listed below into a
    single IOBS component because the site type selected is not compatible.
    Last edited by abimann; 16th September 2018 at 06:14.

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  2. #2
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    Re: different voltages in IO Differencial ports

    You didn't mention the exact board type, thus we can't know which IO banks are supplied by "J6 and J7".

    ISE checks if all IOs of a bank are declared to use the same voltage. The FPGA can't check the actual voltage, but using a voltage outside specifications (e.g. operating LVDS_25 with 3.3V supply) will at least degrade the performance or cause malfunction.



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  3. #3
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    Re: different voltages in IO Differencial ports

    I found problem , clock capable low capacitance ports cannot used i changed ports and that's pass implementation .. thank for all
    Last edited by abimann; 17th September 2018 at 13:15.



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