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Tile size, gates and infrastructure

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peen1

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With technology shrinking every few years, more and more gates are being packed into silicon. Chips are partitioned in tiles, where tiles are synthesized separately.

1) What is the average tile size these days of chip having more than a billion gates?
2) Does Synopsys/Cadence put a limit in their tools as to how many cells/gates they can synthesize in a tile?

When I was in the business of designing chips, I was asked to do an FPGA synthesis. When I ran it on my Intel machine, it crashed. I ran it on the companies x86 server and it took 30 hours. The x86 server processor was running at 3.0 GHz and had lots of RAM and hard disk. When I ran the same job on a Sun Sparc station it took 30 minutes. The Sun sparc station had a 1 Ghz processor and much less RAM and Hard Drive.
3) Why the difference?

4) Since Sun has left the business, what machines are used to synthesize and place and route Billion gate chips these days?

5) When I looked at the Synopsys/Cadence websites, they only seem to offer support for RedHat Linux on x86 and IBM and IBM AIX. Is IBM power9 the machine widely used for backend ASIC work now? How much better is the Power9 than an Intel/AMD x86 server?
 

With technology shrinking every few years, more and more gates are being packed into silicon. Chips are partitioned in tiles, where tiles are synthesized separately.

1) What is the average tile size these days of chip having more than a billion gates?
2) Does Synopsys/Cadence put a limit in their tools as to how many cells/gates they can synthesize in a tile?

When I was in the business of designing chips, I was asked to do an FPGA synthesis. When I ran it on my Intel machine, it crashed. I ran it on the companies x86 server and it took 30 hours. The x86 server processor was running at 3.0 GHz and had lots of RAM and hard disk. When I ran the same job on a Sun Sparc station it took 30 minutes. The Sun sparc station had a 1 Ghz processor and much less RAM and Hard Drive.
3) Why the difference?

4) Since Sun has left the business, what machines are used to synthesize and place and route Billion gate chips these days?

5) When I looked at the Synopsys/Cadence websites, they only seem to offer support for RedHat Linux on x86 and IBM and IBM AIX. Is IBM power9 the machine widely used for backend ASIC work now? How much better is the Power9 than an Intel/AMD x86 server?

1 - tile is not a common terminology, I can't tell if you are talking about std cells or partitions.
2- not if you have a commercial license
3 - bug? who knows.
4 - x86 for sure.
5 - IBM has a tiny share of the market.
 

2) Yes for the cheaper licenses. No for the full licenses. But quality of results and runtime will degrade if you try to P&R too many at a time.
4) x64 / Linux
5) No
 

Back in the day, the reason why a sun sparc station could run circles around an x86 was due to its amazing instruction set. I asked sun that specifically. They said that Microsoft dictates that Dos must be able to run on all x86 processors. This backward compatibility requirement means that x86 processors must support 70s instruction set. IBM and Sun do not have such limitation. This is the reason why IBM has a monopoly over large scale systems like Govt database, earth quake monitoring systems, scientific systems, mission critical systems etc. The x86 processors do not play in this arena.
 

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