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Serial Communication UART in 8051

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RAHUL_KUMAR

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As 8051 have only one SBUF register ,(but physically two SBUF register ,one for read and another for write),but having only one RAM address of 099h.
so can it be FULL DUPLEX.
How can we read and write data simultaneously ,if it is full duplex ?
 

There is a READ SBUF and a WRITE SBUF. They share the same address but are physically different, as you noted.
 
yes ,exactly ....thats y already mentioned those information in my question

lets clear my question ......
suppose in assembly i write
MOV SBUF,A (it will write the data into SBUF write register buffer)
MOV A,SBUF(it will read the data of SBUF read register buffer)
.....let say in both different register buffer two different data are written and read respectively
which data will the memory 99H(SBUF RAM address) can be accessed or reflected ,if we write the instruction
MOV SBUF,A ......the previous one which was written by SBUF to A or the last one which read by A to SBUF.

being the duplex ,we should access both the value different data value ,but we have the only one memory to access that.
hope i am clear with the question.
 

I think you are getting your brain tied in knots. It would have been clearer if they called the two different registers two different names, but they don't. They should have called them wSBUF and rSBUF; then your code would be something like:

<CODE> MOV wSBUF, A
MOV A,rSBUF
<CODE>

What you read from SBUF has nothing to do with what you write to SBUF, they are, again, two separate registers. One can ONLY be read; the other can ONLY be written. The data you read from SBUF comes from the RX port, not from what you've written to SBUF.
 
Hi,

Full duplex or half duplex is only related to the serial side of the interface.
It has nothing to do with the parallel(controller) side.

Btw: with software you never can do write and read at the same time.

Klaus
 
Hi,

Like the example given by barry in post#4 you see two MOVE commands. They are not executed at the same time, they are executed one after the other.

Klaus
 
So, for being a full duplex ,it is not a matter of concern whether we can read and write two different data to SBUF register, right !! ?
As it is only concerned to serial side not to parallel or controller side.
Means for being a full duplex ,it is not matter of concern that we can read and write two different data simultaneously.
If receiving and transmitting operation are occurring simultaneously ,then we can consider that FULL DUPLEX. (it doesn't matter we can handle two different data or not, though klaus also said that using software we can handle that)
m i right ,wt i understood???
 

Sort of. The process of sending serial data from a UART is achieved by hardware shift registers. One shift register for outgoing data and one for incoming data. They can operate simultaneously and without any software support. All the program has to do is make sure there is data to load to the TX shift register when it is empty and there is a warning that data needs to be read from the RX register when it is full. So the sending and receiving can be full duplex, the hardware handles it while the program can be doing something else.

Brian.
 
Hi,

Take a sheet of paper and a pencil and draw the the serial signal for transmitting one byte.
With a baud rate of 19,200 baud (example) this takes about 520us (Start + 8 bits + Stop = 10 bits)

But to read /write one byte (MOVE) from/to the periferal takes less than one us only (depending on microcontroller type an clock frequency). Thus the microcontroller software has plenty of time to process both Rx and Tx.

Klaus
 
mov r0,#30h
mov a,sbuf(read mode) let say 20h is received from sbuf to a
mov sbuf,r0 (write mode) 30h is written in sbuf write register, it implies data 20h is still there in read sbuf register.

now if we look into the ram location 99h, which data will be reflected ,data of write sbuf register or read sbuf register.

number 2) if we can access both the data by using the software ,then can anyone plz help me how ??
or else any program sample.
 

We can explain it to you, but we can't understand it for you. We keep telling you there are TWO SEPARATE REGISTERS, and you keep refusing to accept that.
"Look into the RAM" doesn't mean anything. Do you mean READ from the RAM? What do you mean "access the data"? Again(again) you can only write to the transmit SBUF, and read from the receive SBUF.
 

We keep telling you there are TWO SEPARATE REGISTERS, and you keep refusing to accept that.
I am sorry to have objection to you ,SIR (berry)
please go through my very first post where i put my question...i am sure you need to edit your line .
I have clearly mentioned by myself that there are two different register.

- - - Updated - - -

"Look into the RAM" doesn't mean anything. Do you mean READ from the RAM? What do you mean "access the data"?

RAM address is memory mapping for different registers used inside the processor right?
RAM address is also mapped for SFRs right?
To look into what register contain the value ,we go to look into RAM address ..(please feel free to rectify if i am wrong)

If i look into what register contain the value , we look for corresponding RAM location (can i say "to access" or simply "to know" or "to look or "to read or write"?)

every register have its one corresponding RAM address mapped.
but as far as SBUF is concerned ,two register are there inside the processor i.e write and read register ,but for both the register are maaped with only one RAM location are mapped i.e 99h.

please rectify me sir, where ever you find me wrong in my understanding...afterall i see you people as my guider..
i will come to my point of question next to this post..

- - - Updated - - -

mov r0,#30h
mov a,sbuf(read mode) let say 20h is received from sbuf to a
mov sbuf,r0 (write mode) 30h is written in sbuf write register, it implies data 20h is still there in read sbuf register.

moving r0 value to sbuf in the last line have not affected the read SBUF register right !! but by any how can i be able to know that which data it has read before transmitting the the data 30h. (we can aspect it to be coz that read SBUF register is still not affected)

klausST said we can by using software....thats i move on to continue..
sir,
 

Hi,

I find the word "RAM" misleading.
RAM means random access memory, where I think that random means "read and write".
You can write data to one RAM address and when you read the same address you get the same data back that you wrote before.
But this isn't the case here, because there are two independent registers.
* With a "read" you access the one register
* with a "write" you access the other register
You don't get back the data you wrote before.

To avoid confusion I'd rather talk about "address location" instead of "address location".

Klaus
 

I agree, describing SBUF as a RAM cell is basic the error of reasoning.
 

Hi,

I find the word "RAM" misleading.
RAM means random access memory, where I think that random means "read and write".
You can write data to one RAM address and when you read the same address you get the same data back that you wrote before.
But this isn't the case here, because there are two independent registers.
* With a "read" you access the one register
* with a "write" you access the other register
You don't get back the data you wrote before.

To avoid confusion I'd rather talk about "address location" instead of "address location".

Klaus

I think we can co-relate it with the two different physical resisters of having address range 80Fh to FFh which is allocated for both the upper RAM and SFRs too.
so here also same memory has been allocated to UPPER RAM and SFRs too.
but in this case we have the option to access or choose in either of the two registers group.

which i am not finding as far as SBUF is concerned.

anyway i have got sort of satisfactory answer from somewhere else,.thanks to all of geeks moderators.
 

The fact that address 0x99 is also used for "upper" RAM in some 8051 devices has nothing to do with the discussed problem. Upper RAM and SBUF are accessed by different instructions. SFR register file isn't RAM.
 

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