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Finding mosfets for lowest switching loss

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Plecto

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I'm designing a class D amplifier for a work related project. One of the key parameters are low quiescent current and I've figured out that the type of N-ch mosfet used is by far the biggest factor. I've been looking at mosfets with as low as possible total gate charge, and input and output capacitance, but are there other parameters that will influence the quiescent current? I'm also wondering what the difference between input capacitance and total gate charge is? I thought the input capacitance could be calculated by dividing the given gate charge by the specified gate voltage, but that doesn't seem to be the case.
 

Hi,

Total gate carge is caused by input capacitance plus the output capacitance involving the miller effect.

Klaus
 

I see. So when looking at the energy expended by turning a mosfet on and back off, it will suffice to sum the input and output capacitances (assuming that Vgs=Vds) and treat the mosfet as a capacitor of this value?
 

Vds=Vgs is not a very common or useful application.

The Cdg matters a lot because drain voltage is what
swings wide, and opposes the gate drive polarity. The
total gate charge is dVgs*Cgs(V)+dVgd*Cgd(V) and
the capacitances are functions of applied voltages so
datasheet single-test-condition numbers will put simple
calculations off.

Your lowest switching charge FET is probably a eGaN
FET.

But switching charge of the assembly (presumably an H-bridge
either PWM or phase shifted) has a lot more going on than
just cookbook FET gate charge. Shoot-through can dwarf
explicit control currents, and too much non-overlap can be
a big loss term as well if the MOSFET ends up conducting on the
body diode and the diode has a long lifetime.
 

Hi,

No.

I strongly recommend to read some applicatiin note / design not about it.
Almost every MOSFET manufacturer as well as every mosfet_driver_manufacturer will provide such document.

In short:
Because of the miller effect you need to calculate total charge:
Qtot = (input_capacitance + output_capacitance) x gate_voltage
+ output_capacitance x output_voltage.

With this you can only calculate the power/energy you need to drive the gate

But there is additional loss: Integral of (I_D x V_DS) during the time of switchON and switchOFF.
This integral depends on Drain_current behaviour (capacitive, resistive, inductive) .... and how long it takes to switch.

Klaus
 

At quiescent the duty is 50%, thus the level of current being switched off ( ZVS turn on) has an effect on Iq ....

It may be that a more agressive gate driver able to sink ~ 4A and pull the gate to -2V in ~ 20nS will give you more effective turn off ( lower loss) and hence lower Iq

(as long as the gate driver doesn't consume too much more power in achieving this ).
 

Thanks for the replies. I'm not looking to calculate an exact value, I'm just wondering what parameters to look for when choosing a mosfet. Assuming Vgs=Vds=12V (as it is in my application) and instantaneous switching, will this calculation at least put me in the ball park? P=1/2*(Input+output capacitance)*12V^2*f. As this is a work related project, there is a limit to how much time I can spend on this right now, so I can't get into the depths of all the variables that goes into this.
 

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