Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Two stage operational amplifier

Status
Not open for further replies.
G

Green_Ic

Newbie level 5
Joined
Aug 9, 2018
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
76
Hi,

I want to design two stage op amp with n-mos input diff pair and I have one question,why the second stage of op amp is p-mos input common source and what can be if the socond stage is n-mos input common source?

Thanks.

38935358_666785217034831_1578274853486592000_n.jpg
 

Simulate the circuit and see how input common range is affected.
 

The second stage is supposed to match the input load
current density at null so that Vds1=Vds2=Vds3. Any
other setup adds systematic mismatch (Vio, AVOL).

Besides this, putting a NMOS common-source stage
after the Ndiff/Pload pair will just not work right,
reliably. You would have a very hard time turning off
the common source NMOS except for a very limited
range of VIN+, as drain can go no lower than VIN+ - VTN.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top