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Effective width of pmos and nmos in series

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smita1811

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Hello All,
In some part of my circuit, there is a pmos transistor connected between Vdd and node X (circuit 1) and width=w as shown in the image linked below (querypmos.png) . In another circuit, a series of pmos and nmos transitors are connected between Vdd and node X (circuit 2). What will be the widths of pmos and nmos transitors so that the effective width is w between node Vdd and X?

As per the theory of logical effort in cmos circuit, the widths for two nmos(pmos) series transistors is 2w each in order to get the effective width of w. But in this case the transistors are the same i.e. either nmos or pmos. Can we apply this theory to the different transistors i.e one pmos and one nmos in series?

Thanks
 

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Hi smita. In order to answer your question, it is important ti know the gate voltages of the transistors (a,b,c). Is it a logic circuit or analogue circuit?
 

khaled2k said:
Hi smita. In order to answer your question, it is important ti know the gate voltages of the transistors (a,b,c). Is it a logic circuit or analogue circuit?
Click to expand...
It is a digital circuit. a,b and c can each be either '1' or '0'.
 

So as an abbreviation, let us say that Wp= 2Wn as Kp=Kn/2 to have equal speed and equal resistance transistors.
So to have one Wp, you should have two series of (2Wp). If it is one PMOS and one NMOS, it will be 2Wp for the PMOS and Wp for the NMOS (as NMOS has double mobility of PMOS).
 
Last edited:

khaled2k said:
So as an abbreviation, let us say that Wp= 2Wn as Kp=Kn/2 to have equal speed and equal resistance transistors.
So to have one Wp, you should have two series of (2Wp). If it is one PMOS and one NMOS, it will be 2Wp for the PMOS and Wp for the NMOS (as NMOS has double mobility of PMOS).
Click to expand...

Thanks a lot for clearing the doubt. I have started doing my simulations with the same parameters.
 

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