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Kelvin connection vs. parallel connection for current capacity on IC pins

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tenso

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Recently came across a bonding diagram where two metal wirebonds from 2 pads (which were connected on the die) connected to the same Vin pin of a switching regulator. Now as I understand since Vin was high, the two parallel bond wires were used to carry more current from that pin.
However as I understand, that you might a Kelvin connection with 2 bond wires going to an output pin because one of the parallel wires will hardly have current across it and this is used to sense the output voltage while the other one carries current.

How can one recognize if 2 parallel bond wires are being used for current density as opposed to forming a Kelvin connection?
 

If they are truly parallel then they cannot be a Kelvin setup.

For a Kelvin measurement the current is forced on two points,
and voltage is measured "inboard" along the current path but
outboard of the element of interest.


ForceL MeasureL EOI MeasureH ForceH
<-- current flow <--

You will see Kelvin bonding schemes on things like linear
voltage regulators, where it can take out the bond wire
and chip interconnect resistance (leadframe, often let
"be what it is"). Ground kelvin may be omitted if the
current loop does not involve internal ground and ground
current is low.
 

If they are truly parallel then they cannot be a Kelvin setup.

For a Kelvin measurement the current is forced on two points,
and voltage is measured "inboard" along the current path but
outboard of the element of interest.


ForceL MeasureL EOI MeasureH ForceH
<-- current flow <--

You will see Kelvin bonding schemes on things like linear
voltage regulators, where it can take out the bond wire
and chip interconnect resistance (leadframe, often let
"be what it is"). Ground kelvin may be omitted if the
current loop does not involve internal ground and ground
current is low.

so if you could clarify, what does a kelvin setup look like for example on an LDO ? For example if the Vout node is connected to a pad which is connected through a bond wire to the pin, this Vout could be wrong because of the voltage drops. Where would the Kelvin bonding scheme that gives us the accurate output voltage and is it connected to a different pin? How do we get hardly any V drops?
 

Hi,

You posted in the "IC design" section.
* If you are the IC designer, then you decide whether to use kelvin connections or not. You should generate a document where you describe the kelvin connections.
* Maybe the system itself defines paralleling bonding wires in case it is needed to carry high current.

* If you are not the "IC designer", then there should be a document, that describes the kelvin connections.

*****
In any case:
* Parralleled bonding wires may be connected to a single or multiple pads.
* Kelvin wiring will always go to individual pads

Klaus
 

kelvin.PNG

for example in the schematic above, the authors have used a kelvin connection at the output. So if I understand it right there are two bonding pads here where the top one is connected via say top metal to the output of the drain of the PMOS and the other is connected to the feedback network resistor. Both have 2 bond wires connected to them which are then connected to the same Vout pin.

Am I understanding this right? Is the lower connection the one used to measure output voltage accurately? In that case what ensures that current flowing through this bond wire is negligible?

Hi,

You posted in the "IC design" section.
* If you are the IC designer, then you decide whether to use kelvin connections or not. You should generate a document where you describe the kelvin connections.
* Maybe the system itself defines paralleling bonding wires in case it is needed to carry high current.

* If you are not the "IC designer", then there should be a document, that describes the kelvin connections.

*****
In any case:
* Parralleled bonding wires may be connected to a single or multiple pads.
* Kelvin wiring will always go to individual pads

Klaus

I am not the designer but I do aspire to be one so I was studying bonding diagrams to see how connections are made in commercial IC. Unfortunately don't have detailed spec sheets.

But in this case, yes, we have parallel bonding wires because of high current.

Thanks for confirming the second point about Kelvin wiring going to individual pads. If I understand the dick_freebird right, since Kelvin connections are not truly parallel, the pads in a Kelvin connection are routed to different places in the circuit. Like in the picture posted one pad connects to the drain of the pass device and the other to the feedback network.

What ensures that not a lot of current is flowing into the feedback network?
 
Last edited:

Hi,

I see the words "Kelvin connection".. but honestly I can´t find out how this can be a Kelvin connection.

* I expect the signal to be prcessed internally - but I can´t see this.
* I expect it to be conected to R_L directly with an independent wire.
* I expect the lower end of R_L to be wired in Kelvin style, too.

So in my eyes it´s not a kelvin connection, not half, maybe a quarter Kelvin connection, with doubtful benefit.

****
A Kelvin connetion usually is used to prevent from errors caused by voltage drops on wires with (high) current load.
But the voltage drop will be in the power path as well as it´s return path.
Thus a useful Kelvin system should be made with four wires.

***
An example of true Kelvin wiring of a shunt resistor: https://electronics.stackexchange.com/questions/349001/4-terminal-shunt-resistor

Klaus
 

Hi,

I see the words "Kelvin connection".. but honestly I can´t find out how this can be a Kelvin connection.

* I expect the signal to be prcessed internally - but I can´t see this.
* I expect it to be conected to R_L directly with an independent wire.
* I expect the lower end of R_L to be wired in Kelvin style, too.

So in my eyes it´s not a kelvin connection, not half, maybe a quarter Kelvin connection, with doubtful benefit.

****
A Kelvin connetion usually is used to prevent from errors caused by voltage drops on wires with (high) current load.
But the voltage drop will be in the power path as well as it´s return path.
Thus a useful Kelvin system should be made with four wires.

***
An example of true Kelvin wiring of a shunt resistor: https://electronics.stackexchange.com/questions/349001/4-terminal-shunt-resistor

Klaus

First, thanks for taking the time to answer.

The picture above is from an IEEE paper where they are analyzing and comparing the stability of an LDO when the output cap is connected through a single bond wire (case 1) and, case 2, what they call a kelvin connection. The attached picture shows the single bond wire schematic and them analyzing loop gain.

singlebondwire.PNG

I have read about 4 wire measurement/ Kelvin connections but I am trying to understand how it is implemented on an IC die with the bonding pads and the pins (and how to identify if they are multiple bond wires to a pin because of a current density or because it is a kelvin connection)

so how would a Kelvin connection look like on a die for an LDO for example? Each bond wire would have it's own pad as you say. Will the wires be then connected to the same Vout pin? How do you ensure no current (negligible) flows through the Vout sensing pad?

For example, how would Vout for the LDO be measured internally to avoid errors because of voltage drops?
 

Hi,

In your case (schematic of post#5) it is very clear:
* The upper path is the power path, carrying high current
* the lower path is the sensing path. They are not connected internally, thus you can´t talk abot "parallel" connected bond wires. The current through the sense path is limited by the internal circuit, the two resistors.

"true paralled" bonding wires should be connected internally to the same signal as well as externally to the same signal.
With Kelvin wiring this is not the case: Only on one side (here the right side) FORCE and SENSE is connected.

Klaus
 

Hi,

In your case (schematic of post#5) it is very clear:
* The upper path is the power path, carrying high current
* the lower path is the sensing path. They are not connected internally, thus you can´t talk abot "parallel" connected bond wires. The current through the sense path is limited by the internal circuit, the two resistors.

"true paralled" bonding wires should be connected internally to the same signal as well as externally to the same signal.
With Kelvin wiring this is not the case: Only on one side (here the right side) FORCE and SENSE is connected.

Klaus

Thanks that makes things a lot more clear.
 

On a slightly different, but related topic - in real life, i.e. when you account for the layout of a multi-finger power transistor, the sense point is a distributed one, with voltage varying across different fingers. Precision current or voltage sensing becomes much more complex, and requires detailed analysis, where to select the sense point.

On yet another topic - sometimes, multiple wirebonds are used to reduce parasitic inductance, not the resistance...
 

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