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Searching for a suitable method to detect peak heights of nanosecond pulses

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partheniusx

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Dear all,

My goal is to digitize an analog signal and measure the maximum pulse peaks via an ADC device. The signal has the frequency (pulse-repetition-rate) of f = 100 kHz. Furthermore, the analog signal consists of narrow pulses that exhibit pulse durations around ~30 ns. In addition, peak voltages of the pulses are not constant and change in time. Below, you can see the illustration of the signal:

(Note: Actually, pulses are not rectangular-shaped. They have the form of a Gaussian pulse.)

Untitled.png

The problem is that comparing to the period of the signal, pulse durations are very short. So, I think that it is a real challenge to accurately capture the each pulse and detect their peak voltages via an ADC component. I don't know which ADC meet my requirements to detect pulse amplitudes, since I couldn't decide the required sampling rate and bandwidth of ADC.

I don't want to use GSPS-ADCs, since their prices are really high. Can I use kSPS range ADCs to detect pulse heights? (e.g. only one sample for one pulse) I think this method requires the accurate synchronization of ADC clock to analog signal, am I right?

Can you guys give me some design advice to chose a proper ADC to digitize such a signal?

Thanks in advance.
 

Synchronizing ADC clock to input signal with arbitrary timing is hardly possible because you don't know the peak time in advance. If sufficient fast sampling isn't feasible, use analog peak detector.
 
Dear FvM,
Thanks for the response.

I have one more question:
I have to digitize the peak heights of pulses for further computer-based processing of data of pulses. My question is: Can I use an ADC (may be an ADC with a slow sampling rate) to digitize the output of analog peak detector?(Maybe a trivial question but I have to be sure about this.)
 

Synchronizing ADC clock to input signal with arbitrary timing is hardly possible because you don't know the peak time in advance. If sufficient fast sampling isn't feasible, use analog peak detector.

In theory you could extract timing from the train of the pulses using CFD (a constant fraction discriminator) and then trigger the ADC. Or just use 125Msps ADC and a FPGA board.
 
Ideally you could have a sample and hold circuit, which could be triggered by the rising edge of each pulse and an adjustable delay. However building such a fast SH would be somewhat challenging.

If you don't mind some modest errors, a well-designed diode rectifier is probably your best bet. Perhaps with calibration to correct for nonlinearity.
 
I'd think the track/hold amp is where the solution lies. But it's
really the "suitable" that's the question.

Do you need to catch each pulse and criticize in turn, in real
time? Or only capture the crest value as a running average or
a "sampled" value with a don't-care time of capture? These
would point you to very different implementations. Is it
acceptable to steal some pulse energy (as a diode & cap
peak detector) or must it present a "light touch", maybe
even add no distortion (like for example a RF / frequency
domain application, downstream)?

If you can make a delayed image of the waveform then
you could "hold" that, self-clocked by a comparator whose
delay is tuned to the delay element and track/hold ideal
lag, input risetimes and flat-top width, etc.. But getting
high amplifier fidelity at these pulse widths is another
challenge. What does "suitable" have to say about the
required accuracy (amplitude and waveshape) at the end
of it all?
 
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