Problem with ROM in Quartus Prime 16.0

Hi,
Thank you for letting me be a part of this community of altruists.
I am a newbie in VHDL and FPGA design and currently working on a project to create a support vector machine prototype.
I needed to create a ROM from an external data file for which I did below:

1. Create a function inside a package which will read the data file
2. Put the read data in a defined array
3. In the main code - With clock the data will be initiated from the array created after the address is defined

It works without any flaw while doing simulation(Modelsim). But now my goal is to synthesize the code. AFAIK, file cannot be synthesized and FPGA cannot read data from a ROM when created from an external file. Am I correct?

I am using Quartus Prime Lite Edition(Version 16.0). I cannot find megawizard to create a ROM using it. Can someone please give some lights on that?

Files can be used to initialize compile time constants and initial values. In VHDL, you would need to write your own function and do any conversions. Verilog has $readmem/$readmemh.

You should also be able to create RAM/ROM using megawizard. It is listed as RAM, eg: ALTSYNCRAM and ALTDPRAM. You would need a .mif or .hex file for these.

For some very annoying reason, Altera has never supported using textio for initialising ROMs. It supports $readmemh in verilog, and Xilinx has supported textio for rom initialisation for years. Your only options in VHDL are:

1. Define the ROM as a constant (maybe having the VHDL generated from some other source)
2. Define a function to initialise the ROM. If it is a mathematical function, it should be fairly straight forward to write in VHDL.
3. Use a .mif or .hex file. If you need to simulate the design, you will need to use a megawizard/IP catalog generated ROM as using the infered rom with attributes will not load the contents.

Thank you. As mentioned in ver 16 no megawizard option is present. There may be other ways but unfortunately I cant find the way after a massive search everywhere in the universe.

- - - Updated - - -

Thanks Tricky.
1. It works if I define the Rom as constant. But my data is too big. Thats why needed to take from a file.
2. Yes I used a function to read from file and then put it on a memory array. But unfortunately even then it does now read the file. Please be informed that I have used very simple codes to test even. Never worked.
3. I am looking for Ip catalog now. Any source where I can found some information on it? i am realle new, has not much experience on it.

The IP Catalog is the replacement for the megawizard. It should be available from the gui like the megawizard. It is little more than a renaming.

1. Have you tried generating the constant from some other source, like TCL - have TCL generate the VHDL for you, and it reads from a txt file.
2. How is the data generated? is it a mathematical function? why not have the VHDL generate the values. eg:

As mentioned in ver 16 no megawizard option is present.

Click to expand...

Megawizard is now IP Catalog. GUI operation is still the same. You can also instantiate ROM IP directly in VHDL code, using .mif or .hex file for initialization. Review the embedded memory user guide.

Thanks Tricky. I cannot generate the value from VHDL because the data file needed to be modified a lot and its a very big one. Doing it in Python/MATLAB is much easier I felt.
The function you mentioned is the similar one I created. The problem is not the function, the problem is in reading the text file.

But somehow I have now managed to create the ROM using IP catalog and now I have to create a .mif file to initiate the ROM. I wish Altera is supportive like xilinx for textio.

Thanks FVM. Yes I can use it now.