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    Delayed one-shot IC with nanoseconds resolution

    Hello guys!

    I am wondering if there is some part in the market like LTC6994 but with nanoseconds resolution....I need to set pulse delays in the range from 1 ns to 20 ns....

    If there is not any commercial part, any circuit design suggestion to get it manually?

    Thanks in advance.

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    Re: Delayed one-shot IC with nanoseconds resolution

    That's not a one-shot, it's a delay line. Like this:http://www.datadelay.com/datasheets/3D3220.pdf


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    Re: Delayed one-shot IC with nanoseconds resolution

    Quote Originally Posted by flote21 View Post
    Hello guys!

    I am wondering if there is some part in the market like LTC6994 but with nanoseconds resolution....I need to set pulse delays in the range from 1 ns to 20 ns....

    If there is not any commercial part, any circuit design suggestion to get it manually?

    Thanks in advance.
    What kind of line, just a digital line? Why are you delaying it? When you say resolution do you just mean resolution or do you also mean accuracy? On a really quick look that chip appears to set the delay with an analog set point. Analog has infinite resolution (though possibly jitter and drift).

    A really quick search turned up this and that company has a few other options (just noticed barry also posted this)
    http://www.datadelay.com/datasheets/1503.pdf

    And more:
    https://www.digikey.com/products/en/...delay-lines/74



    An FPGA can approach this resolution with various techniques. I implemented a high resolution pwm with 1.25nS resolution which is effectively the same thing. But it also added about 50nS fixed delay on top of that.


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    Re: Delayed one-shot IC with nanoseconds resolution

    This one is exactly what I am looking for:

    http://www.datadelay.com/datasheets/1503.pdf

    But I need one which works with 0-15V digitals pulses...

    Greetings.



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    Re: Delayed one-shot IC with nanoseconds resolution

    15V digital signal with a nS resolution? That sounds daunting. The device you reference says it has a 'dielectric breakdown' of 50V. Does that mean it can operate with a 15V signal? I don't know, maybe ask the manufacturer.



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    Re: Delayed one-shot IC with nanoseconds resolution

    15V logic has poor rise time. Why do you need 1~20ns variable delay when you could do that with a variable R and small fixed C.
    A best design is easily achieved with good test specs™
    A better question deserves a better answer. ™
    ... so include all your acceptance criteria ( values, % tolerance) and assumptions in your question or any design.

    ... Tony Stewart EE since 1975
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    Re: Delayed one-shot IC with nanoseconds resolution

    We had these in the 80’s for window margin tests on clock,data to detect a track’s margin of data error free they were selectable delay lines with an ECL digital mux with +/-2ns to +/-50ns to allow transitions inside that data window. This way BER testing for soft and hard errors could be accelerated by many orders of magnitude depending on noise slope/dB of SNR and jitter. I could easily measure pattern dependent margins to compute asymmetry, supply sensitivity, temp, vibration, media margin, defect mapping etc etc. In HDD’s


    One tool was so simple that you simply inserted it in the system to self clock pseudorandom bit shift early and late by tapped delay lines which it mixed to add jitter until the system reported an error. Thus the SNR could be interpolated or interference made more sensitive.

    It would help greatly to explain your application and preferred interface with as much detail as possible.
    Last edited by SunnySkyguy; 21st September 2018 at 16:02.
    A best design is easily achieved with good test specs™
    A better question deserves a better answer. ™
    ... so include all your acceptance criteria ( values, % tolerance) and assumptions in your question or any design.

    ... Tony Stewart EE since 1975
    - slightly north of Toronto



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