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How higher bits of input and outputs can be accessed to/from FPGA boards?

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Poomagal

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Hello all,
I have xilinx fpga board, To burn 256 bit adder into FPGA, how should I access input and outputs. It means for 4 bit adder I can give input through dip switch and can see output through LED, for which I need to connect through JTAG cable only. But for higher bits, What should I do, and how can I give and get the input and output respectively. I am a beginner here so, please anyone help on this. It will be very much helpful for me. Thank you.
 

How about streaming the input from a data connect - like RS232?
 

Thank you for replying. But what about Chipscope pro tool of Xilinx. Can any one advice for this tool for my purpose. whether my guess is correct or not.Pleas suggest me.
 

To burn 256 bit adder into FPGA, how should I access input and outputs.
Post #2 would be a nice consideration.

A UART tx/rx would be the simplest but it would be a bit slow for 256 bits (if latency is not a problem you can try this out).

Chipscope is mainly used for debugging. Please read the Xilinx documentation. Generally it is not used to get data in/out of an FPGA.
 

Post #2 would be a nice consideration.

A UART tx/rx would be the simplest but it would be a bit slow for 256 bits (if latency is not a problem you can try this out).

Chipscope is mainly used for debugging. Please read the Xilinx documentation. Generally it is not used to get data in/out of an FPGA.


Thank you. Yes UART transmission is sufficient for my work, but I want to know how to implement using it and the procedure to implement using UART transmission. FYI I know how to implement using JTAG and iMPACT tool of Xilnx. I am not aware of UART interconnection in it. Looking forward for replies.
 

Use the Xilinx UART IP core. Or pull off any UART core from Github or OpenCores.

I am not aware of UART interconnection in it. Looking forward for replies.
Google....there are so many tutorials showing you step by step how to communicate with your FPGA board from the PC. Its easy!
 

Look further into chipscope. Because my designs are almost always I2C or SPI controlled I just use that interface for debug and have rarely used chipscope. But on a really quick look I see some references to inputting and outputting data. It may easily solve your entire problem.


As far as the ideas proposed for a usart two physical usart signals into your FPGA from your computer. I hope you gave yourself test-points or a test header. And then you'd need a usart module in the FPGA code to decode the signals. Then you'd need to write your own code to bridge between the usart module's interface and your 256-bit adder.


I'll also suggest SPI which is the simplest serial protocol that exists. Again you'd need to generate physical SPI signals and you'd probably need some sort of hardware 'dongle' to do that (but that shouldn't be hard to find, we use Total Phase Aardvarks a lot).


In general this is the type of thing you should plan for in the initial design and include a specific header for - you always need debug access to an FPGA for development.
 

If you only had JTAG, then you may wish to consider using GNAT for JTAG.
 

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