B21hasni
Junior Member level 3
Error (10344): VHDL expression error at ALU_test.vhd(26): expression has 32 elements,
when I compiled the program below
I got this error
Error (10344): VHDL expression error at ALU_test.vhd(26): expression has 32 elements, but must have 16 elements
How can I override this error and compile successfully??
when I compiled the program below
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 library ieee; use ieee.std_logic_1164.all; use work.ALU.all; entity ALU_test is port(clk, reset: in std_logic; sel: in std_logic_vector(3 downto 0); A,B: in std_logic_vector (15 downto 0); Y: out std_logic_vector (15 downto 0)); end ALU_test; architecture beh of ALU_test is begin process(clk, reset) begin if reset = '1' then Y <= "0000000000000000"; elsif rising_edge(clk) then case sel is When "0000" => Y <= pass_A(A); When "0001" => Y <= Logical_AND (A,B); When "0010" => Y <= Logical_OR (A,B); When "0011" => Y <= addition (A,B); When "0100" => Y <= subtraction (A,B); When "0101" => Y <= multiplication (A,B); When "0110" => Y <= Shift_L (A); When "0111" => Y <= Shift_R (A); when others => Null; end case; end if; end process; end beh;
I got this error
Error (10344): VHDL expression error at ALU_test.vhd(26): expression has 32 elements, but must have 16 elements
How can I override this error and compile successfully??
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