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Create Block in innovus to use on other designs

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Partitioning, in general, is kind of outdated. We try to do everything flat whenever possible, it helps with timing closure. The budgeting part of partitioning has always been a nightmare to get it right.

One thing to realize is that when the partitions are loaded innovus goes to Floorplan view. Unless you switch to physical view, you won't see any standard cells or routing.
 

I know of the innovus views and I am used to switch views to see if everything is ok and has it should. I am also used to mask some metal layers to better analyse route results and the design overall.

I am only trying this because I have a part in my design that is really time critical.
Basically I have to implement a time-to-digital converter (TDC) using digital cells, and in order to have a good linearity the placing and routing of the delay cells is critical.
I was able to get some good results when implementing the delay line alone using some time constraints and by manipulating the floorplan.
When I run the P&R with the entire system, it is hard to ensure good linearity on the chain because of all the optimizations the tool is design to do (it spreads out the delay chain resulting in uniform routing time and cells propagation delays due to load differences resulting from the routing not being homogeneous). So I thought that using partitions, I could optimize the TDC system and then simply integrate it with the rest of my design to see if I could achieve good linearity results.

- - - Updated - - -

I know of the innovus views and I am used to switch views to see if everything is ok and has it should. I am also used to mask some metal layers to better analyse route results and the design overall.

I am only trying this because I have a part in my design that is really time critical.
Basically I have to implement a time-to-digital converter (TDC) using digital cells, and in order to have a good linearity the placing and routing of the delay cells is critical.
I was able to get some good results when implementing the delay line alone using some time constraints and by manipulating the floorplan.
When I run the P&R with the entire system, it is hard to ensure good linearity on the chain because of all the optimizations the tool is design to do (it spreads out the delay chain resulting in uniform routing time and cells propagation delays due to load differences resulting from the routing not being homogeneous). So I thought that using partitions, I could optimize the TDC system and then simply integrate it with the rest of my design to see if I could achieve good linearity results.

- - - Updated - - -

I know of the innovus views and I am used to switch views to see if everything is ok and has it should. I am also used to mask some metal layers to better analyse route results and the design overall.

I am only trying this because I have a part in my design that is really time critical.
Basically I have to implement a time-to-digital converter (TDC) using digital cells, and in order to have a good linearity the placing and routing of the delay cells is critical.
I was able to get some good results when implementing the delay line alone using some time constraints and by manipulating the floorplan.
When I run the P&R with the entire system, it is hard to ensure good linearity on the chain because of all the optimizations the tool is design to do (it spreads out the delay chain resulting in uniform routing time and cells propagation delays due to load differences resulting from the routing not being homogeneous). So I thought that using partitions, I could optimize the TDC system and then simply integrate it with the rest of my design to see if I could achieve good linearity results.

- - - Updated - - -

I know of the innovus views and I am used to switch views to see if everything is ok and has it should. I am also used to mask some metal layers to better analyse route results and the design overall.

I am only trying this because I have a part in my design that is really time critical.
Basically I have to implement a time-to-digital converter (TDC) using digital cells, and in order to have a good linearity the placing and routing of the delay cells is critical.
I was able to get some good results when implementing the delay line alone using some time constraints and by manipulating the floorplan.
When I run the P&R with the entire system, it is hard to ensure good linearity on the chain because of all the optimizations the tool is design to do (it spreads out the delay chain resulting in uniform routing time and cells propagation delays due to load differences resulting from the routing not being homogeneous). So I thought that using partitions, I could optimize the TDC system and then simply integrate it with the rest of my design to see if I could achieve good linearity results.
 

Ok, its been a long time since I last post something related with this thread, but after a training that I attend and the research and some experiments I got what I needed. I will try to share with you what I learn, it may be useful for other people in this forum.

So, regarding partitioning:
- Everyone in the training told me to stay away from it, it is too complicated and the tool is still not good in this, at least the top-down approach. They told me that if I really do need it, I should go bottom-up. To do bottom-up you basically create your module design as if it was a normal flat design, then in innovus, after everything is ok, you just need to export the .lib (timing files), .def, .lef, and .v files of your design (you can find the commands to do it in the Innovus command reference guide). Then, if you are using a cadence flow, you have all the files you need to use this module as a blackbox on other designs, you just have to add the .lib files to the cadence synthesis tool. If you are using design compiler from synopsys however, you will need to convert the .lib file into a .db file. To do so, just use the synopsys lybrary compiler to do this conversion.

There is another approach when what you need is a structured cell positioning in your design. You can use a structural placement file (.sdp) to tell the tool where to put some cell in the design (you can read more about this in the chapter about structural placement in Innovus user guide). basically this .sdp is a file that tells innovus where to place the cells relative to each others. Because you are able to achieve a very uniform placement using this, the routing will also follow a certain pattern (if you are doing a design with a structure that repeats itself, like in a Tapped Delay Line), which makes propagation timings very uniform across all cells.

And that's it. If you really need a hierarchical design, than I advise you to go bottom-up, the tool works better with it. If all you need is a detailed placement of a part of you circuit, to achieve timings uniformity, than go for structural placement (. sdp file is very easy to create and to understand).

Hope this can be useful for anyone,

Thanks for the help
 
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