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No operation (NOP) function

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B21hasni

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I am writing an ALU package with a number of functions, as follow, How can I write No Operation function ??
Code: 
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;

package ALU is
	function addition (A,B: std_logic_vector) return std_logic_vector;
	function subtraction (A,B: std_logic_vector) return std_logic_vector;
	function multiplication (A,B: std_logic_vector) return std_logic_vector;
	function pass_A (A: std_logic_vector) return std_logic_vector;
	function Logical_AND (A,B: std_logic_vector) return std_logic_vector;
	function Logical_OR (A,B: std_logic_vector) return std_logic_vector;
	function shift_R (A: std_logic_vector) return std_logic_vector;
	function shift_L (A: std_logic_vector) return std_logic_vector;
		
end ALU;

package body ALU is
	function addition (A,B: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := A+B;
	return Y;
	end function;
	
	function subtraction (A,B: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := A-B;
	return Y;
	end function;
	
	function multiplication (A,B: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (31 downto 0);
	begin
	Y := A*B;
	return Y;
	end function;
	
	function pass_A (A: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := A;
	return Y;
	end function;

	function Logical_AND (A,B: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := A AND B;
	return Y;
	end function;

	function Logical_OR (A,B: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := A OR B;
	return Y;
	end function;

	function shift_R (A: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := '0'& Y(15 downto 1);
	return Y;
	end function;


	function shift_L (A: std_logic_vector) return std_logic_vector is
	variable Y: std_logic_vector (15 downto 0);
	begin
	Y := Y(14 downto 0)&'0';
	return Y;
	end function;

end package body;
 

Code VHDL - [expand]
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Function noop return std_logic_vector is
Begin
  Return X"0000";
End function;
 

rather than say "it did not work", show us what you did and explain why it didnt work, maybe with the errors or problems you had.
 

Hi,

maybe "it did not work" means that "NOP" does nothing... And that´s what it´s meant to do. ;-)


Klaus
 

It is more difficult to know without more context. no-op means "do nothing". I suspect "pass" in the original design is close to what you want. eg, "mov x, x" This is basically a no-op.
 

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