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PCIe system on startix 10 board, crashing the hard drive of the host system?

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hcu

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pcie system on startix 10 board, crashing the harddrive of host system ??

Hello,

This is the SoC integration targeting for S10 board. For some reason , after programming .sof file on the board and trying to run simple hello_world program in eclipse sdk. I endup with "Download ELF failed" message. After restarting the host, i noticed that OS is crashed and this happens again even after trying on a new Harddisk.

single onchip-memory of 2MB is mapped to BAR0 and i seen it taking 22 size bits in BAR settings tab. (22= 21 for 2mb + 1 for CRA port). correct me if im wrong !!

I am attaching SoC intergration and address space tab screenshorts.

i want to know where the things getting worse because i crashed 2 harddrives till now.
example generated design working fine and taken all pin assignments from there.


Regards,
Anil
 

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Re: pcie system on startix 10 board, crashing the harddrive of host system ??

I suggest to use this board in Stand-alone evaluation board mode without the connection through PCIe.

From QUICK STAR QUIDE:
In this mode, plug the included power supply into the 2x3 pin power connector (J27). This power supply will provide the entire power to the board without the need to obtain power from the PCIe slot or the 2x4 power connector (J26). The power switch SW7 will control powering the board on/off.
 

Re: pcie system on startix 10 board, crashing the harddrive of host system ??

I suggest to use this board in Stand-alone evaluation board mode without the connection through PCIe.

From QUICK STAR QUIDE:
In this mode, plug the included power supply into the 2x3 pin power connector (J27). This power supply will provide the entire power to the board without the need to obtain power from the PCIe slot or the 2x4 power connector (J26). The power switch SW7 will control powering the board on/off.

yes, 2x4 power connector is unused. Only pcie slot is connected. Then atleast i should able to access the OCM from the nios atleast , right ?. But im getting "download elf failed".

we actually do this first i.e accessing the MM-slave devices first from nios processor(sdk code read/write through a c pointer code) and if it looks all good, we turn our seat to host computer.

update:
when i comapred .qsf (quartus settings file) between previously working design and the crashed design. i found these below lines are missing .
Code:
set_global_assignment -name USE_PWRMGT_SCL SDM_IO14
set_global_assignment -name USE_PWRMGT_SDA SDM_IO11
set_global_assignment -name VID_OPERATION_MODE "PMBUS MASTER"
set_global_assignment -name PWRMGT_BUS_SPEED_MODE "400 KHZ"
set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE LTM4677
set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 4F
set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE3_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE4_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE5_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE6_ADDRESS 00
set_global_assignment -name PWRMGT_SLAVE_DEVICE7_ADDRESS 00
set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE ON
set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "AUTO DISCOVERY"
set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS
 
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Re: pcie system on startix 10 board, crashing the harddrive of host system ??

i want to know where the things getting worse because i crashed 2 harddrives till now.

That's why I suggested using external power supply and not to use PCIe on host (unplug this board from PCIe) during the tests.
 

Re: pcie system on startix 10 board, crashing the harddrive of host system ??

That's why I suggested using external power supply and not to use PCIe on host (unplug this board from PCIe) during the tests.

will this work because im using pcie core clock (default 250 Mhz) supplying to all other IP components. (no other clock sources used).
 

Re: pcie system on startix 10 board, crashing the harddrive of host system ??

What functionality you want to test? Is it access to the OCM?

On that board there are plenty of the On-Board Oscillators that you can use.
User Guide: https://www.altera.com/content/dam/...S/pdfs/literature/ug/ug-s10-fpga-devl-kit.pdf
and 4.7.1 On-Board Oscillators.

I can not see any 250 MHz source on that list.
What is the clock architecture in your design?
 
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    hcu

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Re: pcie system on startix 10 board, crashing the harddrive of host system ??

refclk port of pcie is given 100 Mhz. and the clock out from this pcie is 250Mhz.

refclk is connected to AK40 and refclk(n) is connected to AK41. (motherboard reference clock)
Thanks for the document !!

coming to the problem, with fear, i generated a complete new example design from PCIe component and found that it worked perfectly. accessed 8kb from host application code and done read and write and then compared data. its works great. I Bcompared again and i found this line missing
"set_instance_assignment -name IO_STANDARD HCSL -to refclk_clk" apart from previously posted lines.
I want to know the root cause of the failure.


comingback to the experiment u suggested , since clk is coming from motherboard, i dont think it will work by just disconnecting motherboard to s10.
 

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