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key scheduling present-80 vhdl cryptography

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kumatul123

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Hi guys, I am stuck with key scheduling part in lightweight block PRESENT-80 on VHDL not sure how it generates the key in every itration following is a piece of code I am confuse lease help me out in this regard,,

Code VHDL - [expand]
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sbox0utput : present_sbox
        port map (
            datainput => kinput(18 downto 15),
                    dataoutput => koutput(79 downto 76)
                );
        
            expand_process : process (kinput) is
            begin
                koutput(75 downto 0) <= kinput(14 downto 0) & kinput(79 downto 39) & (kinput(38 downto 34) xor std_logic_vector(to_unsigned(r_ctr, 5))) & kinput(33 downto 19);
            end process expand_process;
        end architecture rtl;


please help me out how bit shuffeling is going over there.
 

It appears to be doing exactly what is described in this paper on page 5.

Not sure why you didn't find that paper (which looks to be the original paper on the subject). Maybe you live somewhere that has restrictions on accessing information on crypto?
i Have studied this paper why he shifted every bit by 15 that is my qstn
 

It appears to be doing exactly what is described in this paper on page 5.

Not sure why you didn't find that paper (which looks to be the original paper on the subject). Maybe you live somewhere that has restrictions on accessing information on crypto?

- - - Updated - - -

i Have studied this paper why he shifted every bit by 15 that is my qstn

What do you mean shifted by 15?

Every bit is shifted by 61 to the left as described in the paper.

e.g. bit 14 shifted left by 61 bits becomes bit 75 (14+61), which is what is shown in the code.

I will say the code that you have is written rather strangely, which separates the upper bit rotation into a separate module. I probably would have coded it into a function and added it into the koutput assignment (assuming I wanted the whole thing to be combinational, which this code does do).
 

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