# Cooling SuperSO8 package

1. ## Cooling SuperSO8 package

Hello everyone,

I am planning to use BSC117N08NS5 which is in a SuperSO8 package.

Max power it will dissipate is 1 W and I want heatsinking via PCB itself (PCB horizontal position). I see that Rth(ja)=50 K/W at 6cm^2 area.
I want to allow Tjunction=100ºC in a 25ºC ambient, so Rth(ja)max allowed is 75 K/W.

My question is, how do I know how the area influences the thermal junction-to-ambient resistance ? Is it a linear relationship ? Anyone can provide some docummentation/explanation ?

Thank you for your time !

2. ## Re: Cooling SuperSO8 package

Your selected device commanded cooling area is 6cm^2 with 75uM copper pad connected to drain. so the heat will transferred to
PCB copper pad and dissipate in to air, if more area more deipation

Referance
http://www.ti.com/lit/an/spra953c/spra953c.pdf

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3. ## Re: Cooling SuperSO8 package

The posted formula is applicable for the vertical heat flow through an interface with limited thermal conductivity, e.g. an insulation washer. It does not describe the horizontal heat flow through a copper plane, the topic is beyond the scope of the quoted application note.

Obviously, you have an (inverse) linear relation between copper area and thermal resistance as long as the finite horizontal conductivity can be ignored. Above this range, the thermal resistance is converging against a constant number. You can estimate the overall thermal resistance by a simplified discrete model of concentric rings.

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4. ## Re: Cooling SuperSO8 package

I recognize post #2 formula as the standard conduction thermal resistance for heat flow through that surface.

I believe that is what I need because I did not understand what Infineon was saying with this (page 4, note 1):
"PCB is vertical in still air."

Does that reference the physical position of the PCB ? i.e. PCB is in vertical position ? Or that the flow of heat is vertical through the PCB and hence post #2 formula can be applied ?

Formula #2 can be applied no matter whether the PCB is in vertical or horizontal position. That is why I am wondering why Infineon is saying "PCB is vertical in still air".
Why vertical makes a difference with horizontal ?

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5. ## Re: Cooling SuperSO8 package

I believe that is what I need because I did not understand what Infineon was saying with this (page 4, note 1):
"PCB is vertical in still air."
That's related to natural convection heat transfer. You find empirical formulas for various configurations in technical thermodynamics text books.

Vertical configuration is more effective due to hot air ascending and skimming along the surface.

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6. ## Re: Cooling SuperSO8 package

Hi,

Related to the last line of the last post by FvM, have you noticed that routers are vertical these days, no longer horizontal?

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7. ## Re: Cooling SuperSO8 package

have you noticed that routers are vertical these days, no longer horizontal?
No , but good point.

8. ## Re: Cooling SuperSO8 package

This Wikipedia article gives an idea about the math involved with calculating convection heat transfer https://en.wikipedia.org/wiki/Heat_t...vertical_plane

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9. ## Re: Cooling SuperSO8 package

Thanks... I was looking for some app notes that directly apply it to this electronic problem, surely a lot of people designed with such a package.

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In other words, I was hoping that some app notes already used those formulas (with those coefficients) and obtained accurate results.

10. ## Re: Cooling SuperSO8 package

There are various examples of copper pour heatsinking for small SMD packages like DPAK in manufacturer datasheets.

Accuracy is relative. As the quoted formulas show, heat transfer coefficient is a function of height and temperature difference. To get the thermal resistance, you also have to put in copper plane thermal conductivity and the geometry.

May be someone knows a link to a calculation tool?

11. ## Re: Cooling SuperSO8 package

Speaking of calculation tool, I just found this:

I hope it is more accurate than their average app notes formulas.

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Looks good.

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13. ## Re: Cooling SuperSO8 package

The post #1 transistor (Optimos5 technology) has the same package as the older Optimos3 technology (e.g. BSC057N08NS3G).

In the Optimos3 one, it is specified 62 K/W with minimal footprint area... so, the Optimos5 one must have the same.

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