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11th June 2018, 07:32 #1
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Verilog code for BCD to Floating point representation
How to start writing verilog code to convert a 12 bit BCD to floating point representation???

11th June 2018, 07:32

11th June 2018, 08:39 #2
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Re: Verilog code for BCD to Floating point representation
Hi,
Me not.
Iīm starting with the theory:
* What is the valid BCD range and resolution? (Here it may be "0" to "999" (decimal) as integers. This could make it very simple)
* There are different floating point definitions. Which one to choose
* How is the chosen "floating point" defined? Meaning of each single bit.
* Then I use pencil and paper for a draft.
* Often I use Excel or VBasic for first tests/simulations of my ideas.
Special cases:
* Consider whether you need to define special float values like "NaN". For a defined "BCD > float" it usually it is not necessary  maybe just to show that the value is undefined at startup.
KlausPlease donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.
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12th June 2018, 10:59 #3
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Verilog code for BCD to Floating point representation
The aim was to display the analog floating point value through a seven segment display(of a 3.3V ADC). The code is not working.
Code:module F_P(in,result,decimal ); input [15:0]in; output[11:0]result; output[11:0]decimal; reg [3:0]ex_decimal; reg [7:0]fr_decimal; assign decimal = (in/4095)*3.3; assign [3:0]ex_decimal = [11:8]decimal; assign [7:0]fr_decimal = [ 7:0]decimal; assign result = {ex_decimal,fr_decimal}; endmodule

12th June 2018, 11:21 #4
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Re: Verilog code for BCD to Floating point representation
Hi,
your posts are rather confusing:
Some issues. Please rectify them:
* You say "BCD to float", but your description is "float_to_BCD"
* you say "analog floating point". There is no "analog" floating point. Floating point is always digital.
* you say "floating point" but your code doesnīt contain a "floating point value" at all.
Usually an ADC output is binary type. > read itīs datasheet.
Give more detailed informations:
* draw and show us a sketch of your application
* give the ADC type
* give the display type.
* a schematic will be helpful, too.
KlausPlease donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.

12th June 2018, 20:43 #5
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Re: Verilog code for BCD to Floating point representation
You need to learn Verilog before coding with it. There are syntax errors in this code snippet. You also need to read up on the difference between floating point and fixed point representation of numbers. Learn about offset binary or 2's complement outputs from ADCs and what they mean in relation to the voltage at their analog nput.
For starters here is a list of some problems.
 assign decimal = (in/4095)*3.3; divides by non power of 2 are not synthesizable. Would have to use an IP core (which will require a clock).
 assign decimal = (in/4095)*3.3; multiplies by noninteger constants are not synthesizable and will result in simulation synthesis mismatch.
 result is no more than 6bits as the in/4095 reduces the 16bit input to 4bits and the multiply increases that by 2bits. e.g. 0xFFFF/4095 = 16.003663, 16.003663*3.3 = 52.812, which rounds to 53, and 53 is 0x35 which has only 6bits. Values in the Verilog vectors are not real numbers they are treated as integers.
 because of previous bullet ex_decimal is always 0.
 ex_decimal and fr_decimal can not be used with assign as they are reg they need to be wire if you wish to use assign.
 [3:0]decimal is wrong, bus ranges follow the signal name decimal[3:0].
 you are incorrectly converting to a poorly understood fixed point representation and not a floating point value. Along with dropping most of your significant bits in the process. The result is an incorrect fr (fractional?) value and the ex (exponent) always being 0.

12th June 2018, 23:17 #6
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Re: Verilog code for BCD to Floating point representation
Provided you want to scale the 12bit ADC value to integer millivolts, you may calculate
Code:mv = adc * 3300 / 4096

13th June 2018, 00:02 #7
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Re: Verilog code for BCD to Floating point representation

13th June 2018, 07:04 #8
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Re: Verilog code for BCD to Floating point representation
Sir,
ADC output is binary only i agreed. Iam converting binary in to BCD so now iam having BCD available that is given to the variable "in". using this we can calculate the respective analog value right??? i want this analog value (ranging from 0 to 3.3 V) to be displayed in sevensegment.
All other modules are available with me but, thios is not working as i expected. How to change this code???

13th June 2018, 07:04

13th June 2018, 08:17 #9
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13th June 2018, 08:17

13th June 2018, 09:18 #10
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Re: Verilog code for BCD to Floating point representation
Iam converting binary in to BCD so now iam having BCD available that is given to the variable "in". using this we can calculate the respective analog value right??? i want this analog value (ranging from 0 to 3.3 V) to be displayed in sevensegment.

13th June 2018, 09:34 #11
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Re: Verilog code for BCD to Floating point representation

13th June 2018, 10:35 #12
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Re: Verilog code for BCD to Floating point representation
Now we are talking.
Please update the drawing with a width of the buses and add details how FPGA is connected with a 7segs (e.g. common BCD signals and independent Cathodes/Anodes)?

14th June 2018, 03:22 #13
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Re: Verilog code for BCD to Floating point representation
bus width is of 12 bits. all i have is 12 bit binary and binary converted bcd output. i need the potentiometer voltage reading varying from (0 to 3.3V) through seven segment display using either of the output i have
   Updated   
bus width is of 12 bits. all i have is 12 bit binary and binary converted bcd output. i need the potentiometer voltage reading varying from (0 to 3.3V) through seven segment display using either of the output i have.

14th June 2018, 05:02 #14
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Re: Verilog code for BCD to Floating point representation
ADC output is binary only i agreed. Iam converting binary in to BCD so now iam having BCD available that is given to the variable "in"...
This binary need to be integer divided by 10 and save the remainder this remainder will go to the rightmost display position.
If the quotient is zero, then stop else repeat the process.
If you want to left pad the result with zeros, you repeat the whole process for the total number of display digits.
Now you have got the BCD codings (the remainder values of the successive divisions) and see how they should be sent to the display.
Usually comments are not compiled and it is a good habit to comment your code extensively.

14th June 2018, 05:02

14th June 2018, 06:44 #15
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Re: Verilog code for BCD to Floating point representation
Hi,
People want to help you.
They will lead you step by step through the challenge.
If you don't follow the steps....don't be surprised if they stop to assist you.
Please update the drawing with a width of the buses and add details how FPGA is connected with a 7segs (e.g. common BCD signals and independent Cathodes/Anodes)?
Mind the underlined text.
Believe me or not  but after decades of desinging electronic circuits  I do it this way. Either at the PC, but mostly on a sheet of paper.
KlausPlease donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.

14th June 2018, 08:51 #16
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Re: Verilog code for BCD to Floating point representation
all i have is 12 bit binary and binary converted bcd output.

14th June 2018, 09:26 #17
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Re: Verilog code for BCD to Floating point representation
Hi,
without detailed informations itīs just guessing.
I assume there are just 3 pieces of 7 segment displays.
If so, then I recommend the multiplication to get 0 to 330 integer steps with 10mV stepsize.
KlausPlease donīt contact me via PM, because there is no time to respond to them. No friend requests. Thank you.

14th June 2018, 15:34 #18
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Re: Verilog code for BCD to Floating point representation
If you have 12 bit binary (unsigned int) value, you will need 4 (yes, four) 7seg display (not three).
Max value of the data is 4095, and that will need four display units.

14th June 2018, 15:40 #19
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Re: Verilog code for BCD to Floating point representation
A bit of guessing, yes. Post #3 however suggests scaling to 3.3V, post #11 4 digits.
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