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Configuring BARS and SIZE in Avalon-MM Stratrix 10 Hard IP for PCI Express bars ??

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hcu

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Hello all,

I am working with altera s10. I have some experiments which are ,

exp 1: IP's are My own logic, pcie , OCM ,emif (DDR3)
here OCM is mapped to bar0 and emif is mapped to bar2 , both are prefetechable 64 bit.
this one is working fine . Iam able to do read/write from host which contains 8GB ram.
i.e here totally 2 bars are present & i can observe "each" bar size (gui option) is 30 bits.


exp2 : pcie + my own register sapce + OCM
here i opted 2 bars bar 0 and bar 4 mapped to reg space
this is working fine.

exp3 : exp1 and exp2 clubbed together
here i opted to take one more bar , lets say it is bar 4 and mapped to my register space logic.
i.e here totally 3 bars are present & i can observe each bar size (gui option) is 30 bits.
this exp2 is not working, I mean when i start the HOST system it is booting to BIOS settings and eventually showing "no bootable device detected".



here exp1 and exp2 are working fine , but when i integrate and bringup exp3 . i am facing a problem.

My questions are
1. altera clearly says that the SIZE parameter for each bar "The platform design automatically determines the BAR based on the address width of the slave connected to the master port." but no where it followed this rule. Is there any way to modify this parameter wither any attributes or commands. gui options looks disabled.??
2. why me exp3 is getting failed. ? All connectios in qsys are fine and ok.
3. one more is, CRA(control register access) port of pcie IP, should every bar projected out from this pcie IP should connect to CRA port ??


To have a clear recall, iam attaching a screenshot.

Regards,
Anil
 

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