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HCMOS Oscillator output compatibility with LVCMOS input pins

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garvind25

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Hi,

I was looking to select a clock for my CPLD based project (XC2C256). Hope someone could help.
Can HCMOS oscillator with 3.3v supply be used for LVCMOS3v3 input pin? As I saw in the CPLD datasheet VIH is 2.0v to 3.9v and VIL -0.3v to 0.8v. The output voltage of the oscillator is not specified in the datasheet (though it is mentioned that output waveform is HCMOS type).

CPLD datasheet: Here
Oscillator datasheet: View attachment datasheet.doc

Thanks,
Arvind Gupta
 

Hi,

My opinion to the oscillator file: It is no datasheet. If this is all information the manufacturer can provide, then I won´t use it.

Can HCMOS oscillator with 3.3v supply be used for LVCMOS3v3 input pin?
This is the correct choice.

Klaus
 

If the oscillator meets your needs with the same supply
as used for the CPLD I/Os, then fine. But HCMOS is usually
expected to operate at 5V and the oscillator might show
some degraded attributes (drive strength, so edge squareness,
so perhaps phase noise). You'd have to decide how much
or whether you care.
 

Well the osc that was in the OP's post might be for 3.3V.

Regardless the datasheet is rubbish.
Here are examples of datasheets where I would use the parts
A fox part https://www.foxonline.com/pdfs/f537f539.pdf note it has specifications for output voltages and current.
An IDT part with much more extensive data including more extensive jitter and phase noise testing. https://www.idt.com/document/dst/idt-xo-hcmos-crystal-oscillator-datasheet-xuh

Your datahseet for that "fake/stolen/repackaged/junk/scrap_die/etc" part is pathetic, the fact the datasheet is a DOC file and there is no indication of the manufacturer says, we don't guarantee our part even works and we are afraid you'll come after us if we have any contact information...we just want to steal your money anonymously in safety.

I suggest you just throw the part away and buy from digikey or mouser or some other "real" parts distributor instead of somewhere like Alibaba or similar ilk.
 

OK. Thanks for your response. I am looking for low cost options hence this Chinese component. Can anyone suggest a reliable low cost online vendor who will ship to India pls (Mouser/ Digikey charge a lot for shipping :|). Also pls. do suggest a site for purchasing the Xilinx CPLD as well (XC2C256- VQ 100 package). Do note that this is not a trade inquiry.

Next, I was planning to have a 10 Hz clock option for the CPLD. I narrowed down to TLC 555 timer in astable mode. But as per the datasheet, in 3 v operation mode, TLC555I IC has 2.85v as output. Since I have 3.3 v onboard, I suppose I will end up with something like 3.1 v at output. Is that right? I just want to ensure that the interfacing voltages are correct. Also, since I would be concerned with the leading or tailing edges only, I hope the duty cycle would not matter. In such a case, what is the optimal duty cycle to be selected?

Datasheet of TLC555 : Here

Thanks,
Arvind Gupta
 

OK. Thanks for your response. I am looking for low cost options hence this Chinese component. Can anyone suggest a reliable low cost online vendor who will ship to India pls (Mouser/ Digikey charge a lot for shipping :|)
So are you saying there aren't any IC distributors (ones that don't buy from the fakes/knock-off market) in India for supplying Indian electronics companies with parts?

Part of the reason for using companies like Avnet/Arrow/Future/etc is they actually make an effort to keep the fakes/knock-off parts out of their supply chain. IMO any company that doesn't do that will eventually be relegated to the hobby supply market.
 

Hi,

If you have 23 macrocells available, then generate it from the 50MHz clock.

Usually you need some clock dividerse else where, then you don´t need 23 MCs.
My personal opinion: I´d go for external digital counters instead of the 555. Then the clock is as accurate as the XTAL clock.

Klaus
 

When connecting a CMOS output to CMOS input without much wiring capacitance, you get full 0 to VDD voltage swing. Respectively the quoted TLC555 2.85V spec is inappropriate. It's for 300 uA load current but you have zero load current.
 
When connecting a CMOS output to CMOS input without much wiring capacitance, you get full 0 to VDD voltage swing. Respectively the quoted TLC555 2.85V spec is inappropriate. It's for 300 uA load current but you have zero load current.

So I suppose since there will be no current drawn/ sourced by the CPLD, I can treat the output of TLC555 as no load output (which should be essentially close to supply voltage only - 3.3v). Is that correct?

Thanks,
Arvind Gupta

- - - Updated - - -

So are you saying there aren't any IC distributors (ones that don't buy from the fakes/knock-off market) in India for supplying Indian electronics companies with parts?

Well, could not find for XC2C256 CPLD -100 VQG IC. :-( Maybe it is an outdated IC but it seems chinese sites have it.

Regards,
Arvind Gupta
 

My personal opinion: I´d go for external digital counters instead of the 555. Then the clock is as accurate as the XTAL clock.

Klaus

OK. But how do I exactly divide 50 MHz to get 10 Hz. If I use digital counters nearest I can go is 2^20 (which is not exactly divide by 5000000).

Thanks,
Arvind Gupta
 

Usually the exact clock divider would be implemented in CPLD. You could also use a number of decimal counter ICs like 7490.
 

Hi,

A 555 circuit will not be "exaxt" either.
A 555 circuit needs manual calibration, for every individual device you produce (if you want it exact), a clock divider not.
A 555 circuit will drift with time and temperature, a clock divider not.

If you are fixed to 50MHz..
Use the prime factors: 2^7 × 5^8 if my mind calculation is correct.
If you want to generate 10Hz then you need to divide by 2^6 × 5^7
2^6 is easy, but 5^7 uses a big counter with reset.

But maybe yiu can use a other system clock frequency. Like 64MHz.
The the divider is 2^11 × 5^5. Still not the best solution.

What about this:
Use an external divider by 2^18 and a divide by 19 inside the PLD (just 5 MCs)
Then you get a stable 10.039Hz frequency.

Klaus
 

If you are fixed to 50MHz..

Klaus

Well my board has a VGA output connector as well as a 2 line character LCD display. Hence I would need clock signal little more than 25 MHz and delays of the order of 50 msecs (20Hz). Both these systems need not work with the same clock signal.

Any better suggestion than having two clock sources?

Thanks and Regards,

Arvind Gupta
 

Hi,

Any better suggestion than having two clock sources?
What´s wrong with the options I gave?

Klaus
 

Thanks for your reply. From your suggestion it seems that for a 20Hz clock, I will have to use more than one IC.

Regards,
Arvind Gupta
 

Hi,

I gave these options:
* no external IC: 23 MCs, all internal
* one external IC: divide by 2^16, the rest in CPLD
* two or more external ICs for a complete external divider

Klaus
 
* one external IC: divide by 2^16, the rest in CPLD

OK. Which clock divider IC do you recommend for 2^16 division pls. I will need something which will be easily available in the market (and preferably DIP). Also since I will be connecting the output of the oscillator to one clock pin of the CPLD, can I simply connect the output of the oscillator also to the input of the frequency divider IC as well? Will there be not any loading / signal strength problem for either the output pin of the oscillator/ input clock pin of CPLD or input of clock divider IC?

Thanks,
Arvind Gupta.
 

Hi,

Which clock divider IC do you recommend for 2^16 division pls
Either you or me needs to use a selection guide available at most IC distributor internet sites.

I will need something which will be easily available in the market (and preferably DIP)
This surely depends on the location where you live. I don't know this.

Will there be not any loading / signal strength problem for either the output pin of the oscillator/ input clock pin of CPLD or input of clock divider IC?
This depends on the driving capabilities of your clock oscillator. We don't know what type you use.
--> anyone needs to read the datasheet(s)...
In most cases there is no problem

Klaus
 

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