Puppet123
Full Member level 6
I am doing layout of a passive component and want to have an optimized modeling of the substrate during layout extraction.
How should the substrate contacts be laid out around a passive component for optimized substrate extraction modeling ?
Just a substrate ring ?
I am using SiGe BiCMOS.
Just a ring of substrate contacts around the passive ?
How should the substrate contacts be laid out around a passive component for optimized substrate extraction modeling ?
Just a substrate ring ?
I am using SiGe BiCMOS.
Just a ring of substrate contacts around the passive ?