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the latch is level sensitive. so there is an arc from d to q in latch when en =1. the flop is edge sensitive so there is nothing like d-to-q. it is depended on the clock. So you have clock to q.
there will be an arc for every input to output such the input transition causes an output transition depending on the states of other pins.
[FONT=Courier New] transparent latched
________________ _______________
E ___| |________| |_
_ ________________________ ____________
D _X________________________XXXXXXXXX____________
|--|tE-Q |-tsu-|-th -| |tD-Q|
______ _________________________ _______
Q ______X_________________________XXXXXXXX_______
|--|tE-Q[/FONT]