Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Analog layout Shielding with VDD and VSS

Status
Not open for further replies.

RohithRaj

Newbie level 5
Joined
Apr 8, 2018
Messages
8
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
67
Generally we do shield the signals (parallel shielding) both sides with VSS or VDD.
But, sometimes we do shielding the signal (parallel shielding) with one side VSS and other side with VDD, what are the advantages of this type of shielding ?

Thanks in advance
-Rohith
 

Hi,

To safe one layer of your PCB...

Klaus
 

Hi
My question is related to Analog IC Design, not PCB design
 

Your shields might be "VSS" and "VDD" but -which- VDD
(and VSS) can be a significant question. Power planes
carry switching noise if they are in the current path. A
quiet "branch" would probably be better than opportunistically
running under a logic-bed's power net.
 

Vdd/Vss shielding may be used when you are concerned with rise/fall times. I've had engineers request I do a layout both ways. Add some parasitic caps connected both ways and see if there is a difference.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top