[SOLVED] How to define sdc file description for internally generated clock ?

In my design, I have a clock generation block which generate main clock pulse ( no external clock reference is used like PLL ) . I'm facing problem defining sdc clock description.

I've tried; "create_clock" & "create_generated_clock" both command, but it fails to create any clock tree definition.

**WARN: (IMPCCOPT-4144): The SDC clock func has source pin clk, which is an input pin. Clock trees for this clock will be defined under the corresponding output pins instead.
Type 'man IMPCCOPT-4144' for more detail.
Analyzing clock structure done.
Checking clock tree convergence...
Checking clock tree convergence done.
Placement constraints of type 'region' or 'fence' will not be downgraded to 'guide' because the property change_fences_to_guides has been set to false.
Set place::cacheFPlanSiteMark to 1
**ERROR: (IMPCCOPT-2004): Cannot run 'CCOpt' as no clock trees are defined.
**ERROR: (IMPCCOPT-2196): Cannot run ccopt_design because the command prerequisites were not met. Review the previous error messages for more details about the failure.

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How can I approach to handle this situation?

I may have some misunderstanding about this whole thing and how to approach. Any example or source would be appreciable.

It appears you are defining the clock on an input pin of your block instead of the output pin. Show your SDC file and describe the pin it is actually using/should be using.

Below I draw the actual block diagram of my Design where clk is generated from Ins_1 which is a hard macro and used as input in Ins_2 . I also keep a pin as output from the module for future testing purpose.
My sdc command is:
which is directly generated from genus. I also tried "get_pins" instead of "get_ports" and "create_generated_clock" in stead of "create_clock" just to see if this have any impact on the design.

Could you tell my where is my major mistake is and how can I correct this?
As far as I understand create_clock and create_generated_clock are both command for external input clock or reference clock. But my clock is internal generated clock. As I found no other command for this situation, I tried to go with the usual command. Is this the reason it is not working ? If so, could you tell me How could I create clock tree or sdc for this situation ?

Thank you for your time.

You are pointing to the top level clock which is a mistake. Your SDC should be something like:

create_clock -name "func" -add -period 110.0 -waveform { 0.0 55.5 } [get_pins ins1/clk]

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I tried this command too. This gives this error:

**ERROR: (IMPCCOPT-4082): No timing clocks found therefore cannot extract clock trees. An SDC file should be loaded.

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But if I check constrains, It shows that my sdc file is loaded properly and constraint "func" is created. I'm really lost here.

Sorry for my lack of understanding. Thank you for your time.

Anklon said:

I tried this command too. This gives this error:


But if I check constrains, It shows that my sdc file is loaded properly and constraint "func" is created. I'm really lost here.

Sorry for my lack of understanding. Thank you for your time.

Click to expand...

Look at the drawing you attached. Do you see how "clk" exists in multiple hierarchies? From an SDC point of view you are creating a valid constraint. However, no clock tree can be actually created from it.

Thank You for you help. I get it now.