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3rd May 2018, 20:48 #1
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Multilayer inductor parameter measurement with VNA
I made some multilayer inductors in standard CMOS process with variable inductance. Design principle is similar to this example :
Park, P.; et al. 2004. Variable Inductance Multilayer Inductor with MOSFET Switch Control, IEEE Electron Device Letters, vol. 25, 144–146.
In order to compensate parasitic elements I shorted two pads in the IC design. So my Idea for testing basically was to measure S11 (I have PocketVNA) of my inductor, convert to R and X, measure S11 of my short circuit in IC, convert to R and X, subtract one from another, because parasitic elements connected in series with inductors.
My one of test boards and measurement rig:
However I got results which are back to front e.g.:
each time I open one of control NMOS I get increased inductor resistance and bigger total inductance. In theory it should be opposite, NMOS channel is parallel connected to the part of inductor, at worst inductor resistance should stay similar than before, same with inductance. I measured inductor resistances with dumb multimeter and indeed i got smaller resistances each time I opened a NMOS transistors.
Either my VNA have not enough resolution and parasitic elements are too big compared with actual inductor or my measurement methodology is incorrect.
All advices how to properly measure inductor parameters (R, L, Q, fsr) are welcome.
PS. I tried to calibrate VNA through short circuited pads, but results were way off. I don't have access to better VNA.

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3rd May 2018, 22:12 #2
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Re: Multilayer inductor parameter measurement with VNA
In such measurements "InLine Calibration" is important.So that, calibration reference should be inline with inductor reference.
the second thing, I guess the internal connections of the MOS transistors present more inductor/resistor so MOS transistors don't provide a ideal short circuit internally.
Since you don't know these internal connections, extraction is impossible.It also depends on the frequency..
So many thing can be happen but we have a very little information.

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7th May 2018, 21:11 #3
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Re: Multilayer inductor parameter measurement with VNA
How about my measurument methodology? Is it legit at least in theory?
1)Measure shorted IC pads (parasitics).
2)Measure inductor (DUT+parasitics).
3)Subtract one from another to get R and X of DUT.

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11th June 2018, 06:37 #4
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Re: Multilayer inductor parameter measurement with VNA
First,we need to Understand what types of amplifier measurements are made
with RF VNAs.
• Sparameter / Stability factor (Kfactor)
• Measurements with power leveling
• Gain compression (P1dB compression point)
• PulsedRF measurements
• Intermodulation distortion (IMD)

11th June 2018, 07:06 #5
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Re: Multilayer inductor parameter measurement with VNA
The above quote from a Keysight paper https://www.keysight.com/upload/cmc_...th_VNA_pdf.pdf
isn't related to the thread discussion at all.
   Updated   
How about my measurement methodology? Is it legit at least in theory?

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11th June 2018, 08:25 #6
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Re: Multilayer inductor parameter measurement with VNA
What is the value of your onchip inductor that you try to deembed?
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