pigtwo
Member level 4
Hello all,
I'm trying to define a set of coefficients for some DSP inside a FPGA but I'm running into a problem with defining the coefficients. I want a 1000 element array with each element being 18 bits. I'm running the below code:
When running this I get an error this error:
So it doesn't like the single quote for some reason but I don't understand why. My understanding is that this is how you would define an array like this. I use this code with Modelsim and it works perfectly. Why does ISE not like this?
I've tried removing the single quote and it seems to work but I think it's doing something weird and thinking this is a single 18000 element.
I'm trying to define a set of coefficients for some DSP inside a FPGA but I'm running into a problem with defining the coefficients. I want a 1000 element array with each element being 18 bits. I'm running the below code:
Code Verilog - [expand] 1 2 3 localparam num_taps = 1000; localparam coeff_scale = 16; localparam signed[17:0] coeff[0:999] = '{0, 3, 5, 8, 9, 10, 10, 9, ...};
When running this I get an error this error:
Code:
ERROR:HDLCompiler:806 - "filter_coeff_15.h" Line 3: Syntax error near "'".
So it doesn't like the single quote for some reason but I don't understand why. My understanding is that this is how you would define an array like this. I use this code with Modelsim and it works perfectly. Why does ISE not like this?
I've tried removing the single quote and it seems to work but I think it's doing something weird and thinking this is a single 18000 element.