Ontoshe
Newbie level 1
Hello!
Few days ago the customer asked me to estimate insulation resistance between two nets on the PCB that we're going to launch into production cycle (required value is ≥ 1 GΩ) but I have no idea how to calculate this.
I've just completed the design of a multilayed board, the mentioned nets performed with two polygons and located in two adjacent internal layers. The minimum clearance between any elements of these two nets is about 0.3 mm (between plated via hole and a polygon), the distance between two internal layers isn't defined yet as stackup not agreed with manufacturer but let's assume that now we have about 0.3 mm. We plan to use IT-180A laminate as a dielectric (it has 1...3*10^10 MOhm-cm of volume resistivity). The maximum voltage difference between these nets is 80V (0-80V or -40V to +40V).
Does anyone have experience with a such calculation?
Few days ago the customer asked me to estimate insulation resistance between two nets on the PCB that we're going to launch into production cycle (required value is ≥ 1 GΩ) but I have no idea how to calculate this.
I've just completed the design of a multilayed board, the mentioned nets performed with two polygons and located in two adjacent internal layers. The minimum clearance between any elements of these two nets is about 0.3 mm (between plated via hole and a polygon), the distance between two internal layers isn't defined yet as stackup not agreed with manufacturer but let's assume that now we have about 0.3 mm. We plan to use IT-180A laminate as a dielectric (it has 1...3*10^10 MOhm-cm of volume resistivity). The maximum voltage difference between these nets is 80V (0-80V or -40V to +40V).
Does anyone have experience with a such calculation?