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Biasing the transistors in folded cascode with CMFB and current reference

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deveshkm

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Hi,

Please comment on the above biasing methodology for PMOS transistors
At the top (folding point) I have biased using simple current mirror (PMOS) with the current reference designed for reducing temperature variation.
The current mirror is easily implemented as source terminals are at Vdd.

Obviously , the current through upper and lower PMOS pairs carry different currents.
For the lower PMOS, I have biased using CMFB (split transistor)

Is it okay to NOT bias the upper PMOS BUT the lower PMOS transistors using CMFB?
 

No. Lower PMOS devices are cascodes. You should bias them with a fix gate voltage like the NMOS devices and control the upper PMOS devices with the common-mode amplifier's output.
 

frankrose said:
No. Lower PMOS devices are cascodes. You should bias them with a fix gate voltage like the NMOS devices and control the upper PMOS devices with the common-mode amplifier's output.
Click to expand...

The upper PMOS carry more current than the lower PMOS as some current is drawn by the amplifying transistors
Hence, in such circuits , is it possible to design a cascode current mirror to bias the PMOS pairs?
 

Possible but nobody does this. You can control the gate voltage of the cascode to push into triode the upper PMOS, and it can change the current. Not a good way.
 

frankrose said:
Possible but nobody does this. You can control the gate voltage of the cascode to push into triode the upper PMOS, and it can change the current. Not a good way.
Click to expand...

Okay.
Now I am using two CMFB blocks .
One for each PMOS pair (upper and lower)
 

Don't control the cascodes (lower PMOS devices), it was the point.
 

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