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  1. #1
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    one clocked process + one combinatorial process

    For https://github.com/KastnerRG/riffa/b...128.v#L95-L107 , are there any reasons to use one clocked process + one combinatorial process ? Will a single clocked process work less better in real hardware implementation ?

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    always @ (posedge CHNL_CLK) begin
        rChnlTx <= #1 (RST ? 1'd0 : _rChnlTx);
        rChnlLast <= #1 _rChnlLast;
        rChnlLen <= #1 _rChnlLen;
        rChnlOff <= #1 _rChnlOff;
    end
     
    always @ (*) begin
        _rChnlTx = CHNL_TX;
        _rChnlLast = CHNL_TX_LAST;
        _rChnlLen = CHNL_TX_LEN;
        _rChnlOff = CHNL_TX_OFF;
    end

    •   Alt12th March 2018, 11:52

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  2. #2
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    Re: one clocked process + one combinatorial process

    Its a style some designers use (and used to be mandated by synthesisors many many years ago).
    One is not better than the other (but both have pros and cons).



    •   Alt12th March 2018, 12:03

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  3. #3
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    Re: one clocked process + one combinatorial process

    both have pros and cons
    Could anyone elaborate on this statement ?



    •   Alt12th March 2018, 13:05

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  4. #4
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    Re: one clocked process + one combinatorial process

    This topic has been done to death!
    Here is an example:
    https://forums.xilinx.com/t5/Synthes...SM/td-p/214607


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