filip.amator
Full Member level 3
Hi!
I am doing a noise analysis of CDS circuit used for pixels readout from CCD sensor. We want to measure voltage difference between reference level and data level. The S1 and S3 switch are closed during reference level phase and later opened during the 'data level' phase. The C7 cap during reference phase is charged (right side is grounded) and later will be discharged from reference level to actual pixel level. My question is: what is the role of U3 and C8?
It looks like an integrator but it is a very uncommon configuration: voltage at C7 is a ground/ref at non-inverting input of U3 and the input bias current is integrated at C8. When S3 is closed it is an ordinary voltage follower.
I am doing a noise analysis of CDS circuit used for pixels readout from CCD sensor. We want to measure voltage difference between reference level and data level. The S1 and S3 switch are closed during reference level phase and later opened during the 'data level' phase. The C7 cap during reference phase is charged (right side is grounded) and later will be discharged from reference level to actual pixel level. My question is: what is the role of U3 and C8?
It looks like an integrator but it is a very uncommon configuration: voltage at C7 is a ground/ref at non-inverting input of U3 and the input bias current is integrated at C8. When S3 is closed it is an ordinary voltage follower.
