[SOLVED] Single Stage CMOS op-amp design

Hello everybody.
I need to desing a single-stage Cmos amplifier with following conditions.
Gain = 20 dB
Bandwidth = 1 MHz
Supply Voltage = 2.5 Volts
Power Budget = 5 mW
Load Capacitance = 100 pF
I made a research and i found the circuit below and made some calculations with respect to it.My question is, is there a simpler circuit design? and could you please help me with this design?



Thank you very much.

sakkano2 said:

... My question is, is there a simpler circuit design?

Click to expand...

That's a good architecture. However it's possible with a simple OTA, if you are able to afford huge transistors, but a lot less of them:


20dB bandwidth is 1MHz, f_T=10MHz, power consumption=4mW

Note: the shown transistor ratios are for a given 180nm process.

Depending on your process, its threshold voltages and other model parameters, you'd have to thoroughly adapt the W/L ratios of the transistors.

These specifications aren't enough. Do you need an OTA or an OPAmp, differential or single-ended? Output swing, input common mode range, noise are matter or aren't?
With feedback isn't too hard to reach 20dB gain at 1MHz actually, especially with 5mW. So if you don't have other specifications the above circuits are good for an OTA.

I just have these specifications i try to made some calculations reach 57.4 db gain. I try to make some adjustement on the circuit but with these specifiaction i am facing a problem because i feel like there are not enough specifications.

frankrose said:

These specifications aren't enough. Do you need an OTA or an OPAmp, differential or single-ended? Output swing, input common mode range, noise are matter or aren't?
With feedback isn't too hard to reach 20dB gain at 1MHz actually, especially with 5mW. So if you don't have other specifications the above circuits are good for an OTA.

Click to expand...

Well i need an CMOS Op-amp circuit . I think ICMR and OVR does not matter because these values did not given to me.

Thank you for your help sir. I need to design Single-stage cmos op-amp , can i use OTA in this design and which program do you use for simulating circuits?

If you don't need exactly 20dB gain, just at least 20dB you can use single stage OTA. Anyhow I am not sure you can maintain with single stage exact 20dB gain for example with capacitive feedback network.
If you need an OPAmp with single-ended output, the classic two-stage amplifier should be good for you. It can handle relatively low resistive loads too, so if you want exactly 20dB gain you can maintain it with higher feedback resistors.
There are lots of tutorials about the design on the web, like this: **broken link removed** (page 26).
If you want full differential OPAmp (input and output is differential too), it is more complicated, then you need common-mode feedback circuit too.
And if the load is 100pF a very important specification is the slew rate. https://www.radio-electronics.com/info/circuits/opamp_basics/operational-amplifier-slew-rate.php
If your output signal's peak is 1V for example, the maximum frequency is 1MHz, the SR will be 6.284V/us. So you have to know the maximum output signal amplitude to determine the currents for example.
LTSpice is good program with simple GUI and very useful features, NI Multisim has better GUI, but setting operating points are complicated, TINA is simple with nice things too but you can't set too much things in it. I suggest LTSpice.

I'm not sure about your understanding of single stage. In my view, it neither involves cascode stages (like the post #1 schematic) nor buffers (as required by an OP). In so far, you are restricted to a basic OTA topology.